Real-time power conservation and thermal management for electronic devices

• US 6,427,211 B2
• Filed: 12/01/2000
• Issued: 07/30/2002
• Est. Priority Date: 10/30/1989
• Status: Expired due to Fees

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Watts, La Vaughn F. Jr.
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US09/727,597
• Publication Number:
  US 20010001880A1
• Time in Patent Office: 606 Days
• Field of Search: 713/501, 713/300, 713/321, 713/322, 713/323, 713/340, 713/320, 700/14, 714/14, 327/513, 702/130, 702/132
• US Class Current: 713/320
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A real-time power conservation and thermal management apparatus and method for portable computers employs a monitor (40) to determine whether a CPU may rest based upon a real-time sample of the CPU activity and temperature levels and to activate a hardware selector(500, 510, 520, 530) to carry out the monitor'"'"'s determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time (280); if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level (330). Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a “ready” state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation and thermal management in response to the real-time sampling of CPU activity (10) and temperature (24). Such adjustments are accomplished within the CPU cycles and do not affect the user'"'"'s perception of performance and do not affect any system application software executing on the computer.

Claims

1. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the utilization percentage of said processing unit.

2. The apparatus of claim 1, wherein said monitor inhibits the modification of said clock signal while said processing unit is processing critical I/O, even when said temperature associated with said processing unit is above a preselected threshold temperature level.

3. The apparatus of claim 1, wherein said monitor sends signals to a clock manager requesting the clock manager to demodify the clock signal being sent to the processing unit in response to said monitor detecting a critical I/O request, even when said temperature associated with said processing unit is above a preselected threshold temperature level.

4. The apparatus of claim 1, wherein said monitor is within said processing unit.

5. The apparatus of claim 1, wherein a temperature sensor is mounted on a printed wiring board (PWB) board adjacent said processing unit.

6. The apparatus of claim 1, wherein the frequency of temperature sensing is user modifiable.

7. The apparatus of claim 1, wherein the frequency of temperature sensing changes as said temperature reaches preselected threshold values.

8. The apparatus of claim 1, wherein said monitor is self-tuning.

9. The apparatus of claim 8, wherein said monitor uses a control system of continuous feedback loops.

10. The apparatus of claim 1, wherein said processing unit is a central processing unit (CPU).

11. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit in response to the utilization percentage of said processing unit being below a preselected level and/or temperature associated with said processing unit.

12. The apparatus of claim 11, wherein said processing unit is a central processing unit (CPU).

13. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a a clock signal being sent to said processing unit in response to one of;

a) the utilization percentage of said processing unit being below a preselected level;

b) temperature associated with said processing unit; and

c) the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

14. The apparatus of claim 13, wherein said processing unit is a central processing unit (CPU).

15. An apparatus comprising:

a processing unit having a monitor for measuring the relative amount of idle time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to minimize the idle time in said processing unit.

16. The apparatus of claim 15, wherein said processing unit is a central processing unit (CPU).

17. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to minimize the relative amount of idle time in said processing unit in response to the utilization percentage of said processing unit being below a preselected level and/or temperature associated with said processing unit.

18. The apparatus of claim 17, wherein said processing unit is a central processing unit (CPU).

19. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to minimize the relative amount of idle time within said processing unit in response to one of;

a) the utilization percentage of said processing unit being below a predetermined level;

b) temperature associated with said processing unit; and

c) the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

20. The apparatus of claim 19, wherein said processing unit is a central processing unit (CPU).

21. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the utilization percentage of said processing unit.

22. The apparatus of claim 21, wherein said monitor inhibits the modification of said clock signal while said processing unit is processing critical I/O, even when said temperature associated with said processing unit is above a preselected threshold temperature level.

23. The apparatus of claim 21, wherein said monitor sends signals to a clock manager requesting the clock manager to demodify the clock signal being sent to the processing unit in response to said monitor detecting a critical I/O request, even when said temperature associated with said processing unit is above a preselected threshold temperature level.

24. The apparatus of claim 21, wherein said monitor is within said processing unit.

25. The apparatus of claim 21, wherein a temperature sensor is mounted on a printed wiring board (PWB) board adjacent said processing unit.

26. The apparatus of claim 21, wherein the frequency of temperature sensing is user modifiable.

27. The apparatus of claim 21, wherein the frequency of temperature sensing changes as said temperature reaches preselected threshold values.

28. The apparatus of claim 21, wherein said monitor is self-tuning.

29. The apparatus of claim 28, wherein said monitor uses a control system of continuous feedback loops.

30. The apparatus of claim 21, wherein said processing unit is a central processing unit (CPU).

31. An apparatus comprising:

a processing unit having a monitor for measuring the relative amount of activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit in response to the utilization percentage of said processing unit being below a preselected level and/or temperature associated with said processing unit.

32. The apparatus of claim 31, wherein said processing unit is a central processing unit (CPU).

33. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit in response to one of;

a) the utilization percentage of said processing unit being below a preselected level;

b) temperature associated with said processing unit; and

c) the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

34. The apparatus of claim 33, wherein said processing unit is a central processing unit (CPU).

35. An apparatus comprising:

a processing unit having a monitor for measuring the relative amount of activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the activity time in said processing unit.

36. The apparatus of claim 35, wherein said processing unit is a central processing unit (CPU).

37. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the activity time within said processing unit in response to one of the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

38. The apparatus of claim 37, wherein said processing unit is a central processing unit (CPU).

39. An apparatus comprising:

a processing unit having a monitor for measuring the relative amount of activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the activity time within said processing unit in response to one of;

a) the utilization percentage of said processing unit being below a preselected level;

b) temperature associated with said processing unit; and

c) the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

40. The apparatus of claim 39, wherein said processing unit is a central processing unit (CPU).

41. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the utilization percentage of said processing unit.

42. The apparatus of claim 41, wherein said processing unit is a central processing unit (CPU).

43. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit in response to one of the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

44. The apparatus of claim 43, wherein said processing unit is a central processing unit (CPU).

45. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit in response to one of;

a) the utilization percentage of said processing unit being below a preselected level;

b) temperature associated with said processing unit; and

c) the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

46. The apparatus of claim 45, wherein said processing unit is a central processing unit (CPU).

47. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to minimize the amount of idle time and optimize the activity time in said processing unit.

48. The apparatus of claim 47, wherein said processing unit is a central processing unit (CPU).

49. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to minimize the amount of idle time and optimize the activity time in said processing unit in response to one of the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

50. The apparatus of claim 49, wherein said processing unit is a central processing unit (CPU).

51. An apparatus, comprising:

a processing unit having a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to minimize the idle time and optimize the activity time within said processing unit in response to one of;

a) the utilization percentage of said processing unit being below a preselected level;

b) temperature associated with said processing unit; and

c) the utilization percentage of said processing unit being below a preselected level and temperature associated with said processing unit.

52. The apparatus of claim 51, wherein said processing unit is a central processing unit (CPU).

53. An apparatus, comprising:

a processing unit having a monitor for measuring the utilization of and temperature associated with said processing unit, result of said measuring being used by said processing unit for providing a signal for circuitry for selectively modifying a clock signal being sent to said processing unit to optimize the utilization percentage of said processing unit.

54. The apparatus of claim 53, wherein said processing unit is a central processing unit (CPU).

55. An apparatus, comprising:

a processing unit having means for determining a utilization percentage of and temperature associated with said processing unit, results of said determining being used by said processing unit for providing a signal for means for adjusting processing speed of said processing unit in response to said determined utilization percentage and temperature to optimize said utilization percentage.

56. The apparatus of claim 55, wherein said processing unit is a central processing unit (CPU).

57. An apparatus comprising:

a processing unit coupled to a clock; and

means for monitoring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said monitoring being used by said processing unit for providing a signal for means, responsive to said monitoring means, for controlling periods of time said clock is in an OFF state, the length of said periods of time said clock is in an OFF state being appropriate to allow said processing unit to operate at an optimized utilization percentage.

58. The apparatus of claim 57, wherein said processing unit is a central processing unit (CPU).

59. An apparatus, comprising:

a processing unit coupled to a clock;

a monitor for measuring the relative amount of idle time and activity time within and temperature associated with said processing unit, results of said monitoring being used by said processing unit for providing a signal for circuitry for controlling periods of time said clock is in an OFF state, the length of said periods of time said clock is in an OFF state being appropriate to allow said processing unit to operate at an optimized utilization percentage.

60. The apparatus of claim 59, wherein energy consumption in said processing unit is at a maximum when the length of each period of time said clock is in an OFF state is at zero.

61. The apparatus of claim 59, wherein energy consumption in said processing unit decreases as the length of each period of time said clock is in an OFF state increases.

62. The apparatus of claim 59, wherein said periods of time said clock is in an OFF state are constantly being adjusted to optimize said utilization percentage and control the temperature of said central processing unit.

63. The apparatus of claim 59, wherein said OFF state represents the minimum clock rate at which said processing unit can operate.

64. The apparatus of claim 59, wherein said minimum clock rate is zero for processing units capable of having their clocks stopped.

65. The apparatus of claim 59, wherein said processing unit is a central processing unit (CPU).