Flip chip device and method of manufacture

• US 6,429,046 B1
• Filed: 07/13/2000
• Issued: 08/06/2002
• Est. Priority Date: 07/13/2000
• Status: Expired due to Term

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Marlin, George W.
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Le, Bau T
• Application Number:
  US09/615,865
• Time in Patent Office: 754 Days
• Field of Search: 228/254, 228/83, 438/614, 438/613, 438/108, 438/612, 148/400, 257/780, 257/733, 257/738, 257/778, 257/779
• US Class Current: 438/108
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05023 the whole internal layer protruding from the surface
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/05184 Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/29099 Material
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 2924/00013 Fully indexed content
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01022 Titanium [Ti]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/3011 : Impedance

Abstract

A method of manufacturing a solder bump on a power copper structure and resultant device is disclosed. In the method, a layer of an electrically conductive, non-wettable material such as TiW is applied over a power copper structure. Then, solder bumps are formed on the non-wettable layer. The presence of the non-wettable layer prevents the collapse of the solder bumps when heated.

Claims

1. A method of manufacturing a flip-chip device comprising:

providing a copper structure formed over a semiconductor device;

applying an electrically conductive non-wettable layer over the power copper structure;

applying a wettable stud over the electrically conductive non-wettable layer; and

applying a solder bump to the wettable stud.

2. The method of claim 1, wherein the step of applying a layer of non-wettable material comprises applying a TiW layer.

4. The method of claim 1, further comprising sputtering a wettable layer over the non-wettable layer.

3. A method of manufacturing a non-wettable surface for use in a flip-chip device comprising:

providing a power copper structure; and

applying an electrically conductive non-wettable layer over the power copper structure, wherein the step of applying a layer of non-wettable material comprises applying a TiW layer; and

wherein the step of applying a layer of TiW further comprises;

sputtering a layer of TiW;

sputtering a layer of copper over the layer of TiW;

depositing a layer of photoresist over the layer of copper;

using an appropriate mask and developing the mask image to remove photoresist from everywhere except over a portion of the power copper structure;

removing the layer of copper from all exposed areas; and

removing the remaining photoresist.

5. A method of manufacturing a non-wettable surface for use in a flip-chip device comprising:

providing a power copper structure;

applying an electrically conductive non-wettable layer over the power copper structure;

and forming a solder bump over the non-wettable layer, wherein the step of forming a solder bump comprises;

coating the device with photoresist;

forming an opening in the photoresist over the power copper structure;

plating a copper stud;

plating solder on the copper stud;

striping the photoresist; and

etching the TiW and copper layers.

6. A semiconductor flip chip device comprising;

a power copper structure formed over a semiconductor device;

an electrically conductive non-wettable layer formed over the power copper structure;

a wettable stud formed with the electrically conductive non-wettable layer; and

a solder bump formed to the wettable stud.

7. The semiconductor flip chip device of claim 6, wherein the device has an adherence layer between the power copper structure and the semiconductor device.

8. The semiconductor flip chip device of claim 6, wherein the non-wettable material is TiW.

9. The semiconductor flip chip device of claim 6, wherein the solder bump comprises lead-tin.

10. The semiconductor flip chip device of claim 6, wherein the adherence layer comprises TiW.