Capacitive isolation system with digital communication and power transfer

• US 6,430,229 B1
• Filed: 04/22/1997
• Issued: 08/06/2002
• Est. Priority Date: 04/22/1997
• Status: Expired due to Fees

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Scott, Jeffrey W., Welland, David R., Sooch, Navdeep S.
• Primary Examiner(s): LUTHER, WILLIAM A
• Application Number:
  US08/837,714
• Time in Patent Office: 1,932 Days
• Field of Search: 375/285, 375/354, 375/359, 379/412, 379/405, 379/399, 379/377, 341/110, 341/126, 341/144, 341/143
• US Class Current: 375/285
• CPC Class Codes: H04L 25/06 Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
• CPC Class Codes: H04L 7/033 using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
• CPC Class Codes: H04M 11/06 Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors

Abstract

An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.

Claims

1. An isolation barrier system having a transmit system on a first side of a set of isolation capacitors and a receive system on a second side of said isolation capacitors, said transmit system adapted to apply a digital signal to the first side of at least one of the isolation capacitors and said receive system adapted to receive a resultant digital signal from the second side of the isolation capacitors, the isolation barrier system comprising:

a power supply circuit having inputs connected to the second side of the isolation capacitors to receive said resultant signal, the power supply circuit comprising a rectifier circuit for generating a DC power supply in response to the resultant digital signal.

2. The isolation system of claim 1, wherein the set of isolation capacitors comprises two capacitors, and wherein the transmit system applies a differential voltage signal to the capacitors.

3. The isolation system of claim 1, wherein the rectifier circuit is an active diode bridge circuit.

4. The isolation system of claim 2, wherein the rectifier circuit is an active diode bridge circuit.

5. The barrier of claim 1, wherein the power supply circuit further comprises a load capacitor connected between an output of the power supply circuit and a receive system ground node.

6. An isolation barrier system having a signal barrier capacitor and a return current barrier capacitor, with a power supply circuit located on an isolated side of said barrier capacitors for generating a DC power supply in response to a digital signal received across the signal barrier capacitor, the power supply comprising:

an inverter having an input connected to the signal capacitor;

an n-channel transistor having its source connected to the signal capacitor, its gate connected to an output of the inverter, and its drain connected to ground;

a p-channel transistor having its source connected to the signal capacitor, its gate connected to the output of the inverter, and its drain connected to an output of the power supply circuit; and

a load capacitor connected between the output of the power supply circuit and ground.

7. The isolation barrier system of claim 6, further comprising a clock recovery circuit connected to the output of the power supply circuit.

8. An isolation barrier system having first and second barrier capacitors for conveying a differential digital signal, with a power supply circuit located on an isolated side of said barrier capacitors for generating a DC power supply in response to the differential digital signal received across the barrier capacitors, the power supply comprising:

a first n-channel transistor having a source connected to the first barrier capacitor, a gate connected to the second barrier capacitor and a drain connected to ground;

a second n-channel transistor having a source connected to the second barrier capacitor, a gate connected to the first barrier capacitor and a drain connected to ground;

a first p-channel transistor having a source connected to the first barrier capacitor, a gate connected to the second barrier capacitor and a drain connected to an output node of the power supply;

a second p-channel transistor having a source connected to the second barrier capacitor, a gate connected to the first barrier capacitor and a drain connected to the output node of the power supply; and

a load capacitor connected between the output of the power supply circuit and ground.

9. The isolation barrier system of claim 8, further comprising a clock recovery circuit connected to the first and second barrier capacitors and to the output of the power supply circuit.

10. A method for providing an isolated DC voltage supply on the isolated side of a capacitive isolation barrier, the barrier also having a powered side, comprising:

providing a rectifier circuit connected to receive a data signal from the capacitive isolation barrier, the rectifier circuit having a DC output node;

applying a time varying data signal to a powered side of the capacitive isolation barrier;

receiving a resultant data signal on the isolated side of the capacitive isolation barrier and applying said resultant data signal to the rectifier circuit; and

rectifying said resultant data signal to produce a DC voltage on the DC output node.

11. The method of claim 10, further comprising providing a load capacitor connected between the DC output node and ground, and charging the load capacitor with the DC voltage.

12. A method of operating circuitry for terminating a phone line connection, comprising:

providing phone line side circuitry operable to communicate with a capacitive isolation barrier and the phone line connection;

receiving a digital signal within the phone line side circuitry, the digital signal being transmitted across the capacitive barrier; and

utilizing the digital signal transmitted across the capacitive barrier to provide a power supply for at least a portion of the phone line side circuitry.

13. The method of claim 12, further comprising transmitting data bi-directionally through at least one capacitor of the capacitive isolation barrier.

14. The method of claim 13 wherein circuitry utilized to extract the power from the digital signal is coupled to at least a first node of the phone line side circuitry, the first node operable to be coupled to at least one capacitor of the capacitive isolation barrier, clock information also being communicated through the first node.

15. The method of claim 13, further comprising encoding control information within a data signal being transmitted across the capacitive barrier, wherein the data signal comprises information to be communicated to the phone line connection.

16. The method of claim 13 wherein the digital signal transmitted across the capacitive isolation barrier further comprises data to be communicated to the phone line connection.

17. The method of claim 13 further comprising recovering a clock signal within the phone line side circuitry from the digital signal.

18. The method of claim 17 wherein circuitry utilized to extract the power from the digital signal is coupled to at least a first node of the phone line side circuitry, the first node operable to be coupled to at least one capacitor of the capacitive isolation barrier, clock information also being communicated through the first node.

19. The method of claim 13, the data being in a pulse density modulation format.

20. The method of claim 12 wherein circuitry utilized to extract the power from the digital signal is coupled to at least a first node of the phone line side circuitry, the first node operable to be coupled to at least one capacitor of the capacitive isolation barrier, clock information also being communicated through the first node.

21. The method of claim 12, further comprising encoding control information within a data signal being transmitted across the capacitive barrier, wherein the data signal comprises information to be communicated to the phone line connection.

22. The method of claim 12 further comprising recovering a clock signal within the phone line side circuitry from the digital signal.

23. The method of claim 22, further comprising encoding control information within a data signal being transmitted across the capacitive barrier, wherein the data signal comprises information to be communicated to the phone line connection.

24. The method of claim 22, further comprising encoding control information within a data signal being transmitted across the capacitive barrier, wherein the data signal comprises information to be communicated to the phone line connection.

25. The method of claim 24, wherein control signals are encoded within the data signal.

26. The method of claim 12, further comprising receiving the digital signal at a bi-directional node in the powered side circuitry, the bidirectional connection coupled to at least one capacitor of the capacitive isolation barrier for transmitting information bi-directionally between the capacitive isolation barrier and the phone line side circuitry.

27. The method of claim 12 wherein the digital signal transmitted across the capacitive isolation barrier further comprises data to be communicated to the phone line connection.

28. Circuitry for terminating a phone line connection, comprising:

phone line side circuitry operable to communicate digitally with a capacitive isolation barrier; and

a power supply circuit located within the phone line side circuitry, the power supply circuit generating a DC power supply from a digital signal received across the capacitive isolation barrier.

29. The circuitry of claim 28 further comprising:

at least one clock signal within the phone line side circuitry, the clock signal being generated from clock information transmitted across the capacitive isolation barrier.

30. The circuitry of claim 29, the phone line side circuitry operable to communicate with the capacitive isolation barrier through at least one bi-directional node.

31. The circuitry of claim 29, the phone line side circuitry further comprising at least one digital to analog converter circuit operable to receive data transmitted across the capacitive isolation barrier in a pulse density modulated format.

32. The circuitry of claim 29, further comprising at least one control signal within the phone line side circuitry, the control signal being capable of being transmitted across the capacitive isolation barrier.

33. The circuitry of claim 29, further comprising encode circuitry within the phone line side circuitry, the encode circuitry generating an encoded digital signal for transmission across said isolation barrier, the encoded digital signal including at least one control signal.

34. The circuitry of claim 29, the power supply and the clock signal being generated from information transmitted through at least one common capacitor of the capacitive isolation barrier.

35. The circuitry of claim 28, the phone line side circuitry operable to communicate with the capacitive isolation barrier through at least one bidirectional node.

36. The circuitry of claim 35, the phone line side circuitry further comprising at least one digital to analog converter circuit operable to receive data transmitted across the capacitive isolation barrier in a pulse density modulated format.

37. The circuitry of claim 35, further comprising at least one control signal within the phone line side circuitry, the control signal being capable of being transmitted across the capacitive isolation barrier.

38. The circuitry of claim 35, further comprising encode circuitry within the phone line side circuitry, the encode circuitry generating an encoded digital signal for transmission across said isolation barrier, the encoded digital signal including at least one control signal.

39. The circuitry of claim 28, the phone line side circuitry further comprising at least one digital to analog converter circuit operable to receive data transmitted across the capacitive isolation barrier in a pulse density modulated format.

40. The circuitry of claim 39, further comprising at least one control signal within the phone line side circuitry, the control signal being capable of being transmitted across the capacitive isolation barrier.

41. The circuitry of claim 39, further comprising encode circuitry within the phone line side circuitry, the encode circuitry generating an encoded digital signal for transmission across said isolation barrier, the encoded digital signal including at least one control signal.

42. The circuitry of claim 28, further comprising clock circuitry within the phone line side circuitry, the power supply generation circuitry and the clock circuitry being coupled to at least one input node of the phone line side circuitry, the at least one input node being configured to be coupled to at least one capacitive element of the capacitive isolation barrier.

43. The circuitry of claim 42, the phone line side circuitry operable to communicate with the capacitive isolation barrier through at least one bi-directional node.

44. The circuitry of claim 28, further comprising at least one control signal within the phone line side circuitry, the control signal being capable of being transmitted across the capacitive isolation barrier.

45. The circuitry of claim 44, the control signal being encoded within digital data for transmission across the capacitive isolation barrier, the digital data representing information transmitted from the phone line connection.

46. The circuitry of claim 28, further comprising encode circuitry within the phone line side circuitry, the encode circuitry generating an encoded digital signal for transmission across said isolation barrier, the encoded digital signal including at least one control signal.