Prefix search circuitry and method
First Claim
1. Prefix search circuitry comprising, in an integrated circuit, a plurality of prefix search engines, each performing a prefix search of a prefix search tree data structure based on a prefix search key, each prefix search engine comprising:
- a comparator that compares a search key with data from the prefix search tree data structure; and
an address calculator which calculates, in a forward pass of the tree data structure toward a leaf, memory addresses of nodes of the tree data structure based on the comparator output to read data of the prefix search data structure from memory.
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Abstract
Prefix searches for directing internet data packets are performed in a prefix search integrated circuit. The integrated circuit includes an array of search engines, each of which accesses a prefix search tree data structure to process a prefix search. An SDRAM is dedicated to each search engine, and SDRAMs share address and control pins to plural search engines on the IC chip. Internal nodes of the tree data structure are duplicated across banks of the SDRALMs to increase bandwidth, and leaf nodes are stored across the SDRAM banks to reduce storage requirements. Within each search engine, data stored in a data register from an SDRAM is compared to a prefix search key stored in a key register. Based on that comparison, an address is calculated to access further tree structure data from the SDRAM. Packet descriptors containing search keys are forwarded to the search engines from an input queue and the search results are forwarded to an output queue, the same packet order being maintained in the two queues.
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Citations
17 Claims
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1. Prefix search circuitry comprising, in an integrated circuit, a plurality of prefix search engines, each performing a prefix search of a prefix search tree data structure based on a prefix search key, each prefix search engine comprising:
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a comparator that compares a search key with data from the prefix search tree data structure; and
an address calculator which calculates, in a forward pass of the tree data structure toward a leaf, memory addresses of nodes of the tree data structure based on the comparator output to read data of the prefix search data structure from memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
an input queue for receiving input packet descriptors;
an output queue; and
a network for distributing prefix search keys from the input packet descriptors to the plurality of prefix search engines as the engines become idle and for forwarding the results of prefix searches of the plural prefix search engines to the output queue in an order independent of the order in the input queue.
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3. Prefix search circuitry as claimed in claim 2 wherein the results of the prefix searches are ordered in the output queue in the same order that the corresponding input packet descriptors arrived at the input queue.
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4. Prefix search circuitry as claimed in claim 2 wherein the network comprises a bus.
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5. Prefix search circuitry as claimed in claim 1 further comprising an array of memory units, each unit dedicated to a search engine within the integrated circuit.
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6. Prefix search circuitry as claimed in claim 5 wherein each search engine reads data in bursts over integrated circuit data pins dedicated to the search engine and each search engine addresses a memory unit over integrated circuit pins shared with another search engine.
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7. Prefix search circuitry as claimed in claim 6 wherein each memory unit is a synchronous dynamic random access memory (SDRAM).
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8. Prefix search circuitry as claimed in claim 6 wherein each memory unit comprises plural banks of memory cells and a prefix search tree data structure is stored across the plural banks to provide access to the tree structure in successive read cycles.
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9. Prefix search circuitry as claimed in claim 1 further comprising an array of memory units, each having plural banks of memory cells, and a prefix search tree data structure stored across the plural banks to provide access to the tree structure in successive read cycles.
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10. Prefix search circuitry as claimed in claim 9 wherein duplicate copies of internal nodes of the tree structure are stored in each of plural banks.
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11. Prefix search circuitry as claimed in claim 10 wherein leaf nodes are interleaved across plural banks.
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12. Prefix search circuitry as claimed in claim 1 wherein each prefix search engine comprises a data register which receives data of the tree structure from memory and a search key register, the comparator comparing a search key in the search key register with data from the data register.
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13. Prefix search circuitry as claimed in claim 1 wherein the address calculator selects the address of the next tree node based on the comparator output.
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14. Prefix search circuitry as claimed in claim 13 wherein the address calculator selects an address as a result of a comparison of plural stored keys with the search key.
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15. A prefix search engine comprising:
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a data register which receives data of a tree structure from memory;
a search key register;
a comparator which compares a search key in the search key register with data from the data register; and
an address calculator which calculates, in a forward pass of the tree data structure toward a leaf, memory addresses of nodes of the tree data structure based on the comparator output to read the data from memory into the data register. - View Dependent Claims (16, 17)
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Specification