Method of manufacturing semiconductor device

• US 6,432,776 B1
• Filed: 08/22/2000
• Issued: 08/13/2002
• Est. Priority Date: 08/23/1999
• Status: Expired due to Fees

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Ono, Atsuki
• Primary Examiner(s): Everhart, Caridad
• Assistant Examiner(s): Anya, Igwe U..
• Application Number:
  US09/643,771
• Time in Patent Office: 721 Days
• Field of Search: 438/275, 438/199, 438/299, 438/303, 438/305, 438/673, 438/713, 438/585, 438/595, 438/258, 438/655, 438/238, 438/257, 438/210, 438/270, 438/271, 438/589, 438/239, 438/351, 438/279, 438/231, 438/241
• US Class Current: 438/275
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/82345 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 21/823462 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 21/823857 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 29/105 with vertical doping variation H01L29/7827 takes precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence

Abstract

A section separator region is formed in a semiconductor substrate in which a p-type well region has been formed, to separate the substrate into an I/O section and a core section. An oxide film and a plysilicon film are form at the I/O section, and pre-formation treatment is carried out. Then, an oxide film is formed over the exposed surface by the thermal oxidization. A metal film is formed on the oxide film. The metal film on the I/O section is moved. The polysilicon film and the metal film are patterned to be gate electrodes. Then, ion implantation is carried out to implant impurity into the exposed surface to form source/drain regions corresponding to the gate electrodes respectively.

Claims

1. A method of manufacturing a semiconductor device comprising:

forming a section separator region in a semiconductor substrate to separate said semiconductor substrate into a first region and a second region;

forming a first insulation film at said first region on said semiconductor substrate

forming a first gate electrode material layer on said first insulation film;

forming a second insulation film whose thickness differs from the thickness of said first insulation film over the exposed surface after said first gate electrode material layer is formed;

forming a second gate electrode material layer on said second gate insulation film

removing said second gate electrode material layer at said first region after said second gate electrode material layer is formed;

forming a first gate electrode with said first gate electrode material layer at said first region after said second gate electrode material layer is removed, while forming a second gate electrode with said second gate electrode material layer at said second region;

removing second insulation film remaining on said first gate electrode after said first and second gate electrodes are formed;

forming first source/drain regions at said first region, and forming second source/drain regions at said second region, after said second insulation film is removed; and

etching said first and second insulation films with masking by said first and second gate electrodes to form a first and second gate insulation films, after said first and second source/drain regions are formed.

2. A method of manufacturing a semiconductor device, the method, comprising:

forming a section separator region in a semiconductor substrate to separate said semiconductor substrate into a first region and a second region;

forming a first insulation film at said first region on said semiconductor substrate;

forming a first gate electrode material layer on said first insulation film;

forming a protection film only on said first gate electrode material layer;

forming a second insulation film at said second region after said protection film is formed;

forming a second gate electrode material layer over an exposed surface including surfaces of said protection film and said second insulation film, after said second insulation film is formed;

removing said second gate electrode material layer at said first region after said second gate electrode material layer is formed;

forming a first gate electrode with said first gate electrode material layer at said first region after said second gate electrode material layer is removed, while forming a second gate electrode with said second gate electrode material layer at said second region;

forming first source/drain regions at said first region, and forming second source/drain regions at said second region; and

etching said first and second insulation films with masking by said first and second gate electrodes to form a first and a second gate insulation film, after said first and second source/drain regions are formed.

3. The method according to claim 2, wherein said removing includes polishing said second gate electrode material layer on said protection film which acts as a stopper.

4. The method according to claim 3, wherein said protection film comprises silicon nitride.

5. The method according to claim 2, wherein said first gate electrode material layer comprises at least one of polysilcion and polycide.

6. The method according to claim 2, wherein said second gate electrode material layer includes at least one of a refractory metal and a refractory silicide.

7. The method according to claim 6, further comprising forming a barrier metal between said second gate electrode material layer of said at least one of said refractory metal and said refractory silicide and said second gate electrode insulation film.

8. The method according to claim 2, wherein

each of said first and second source/drain regions has a predetermined concentration,

a plurality of side walls corresponding to said first and second gate electrodes are formed after said source/drain regions are formed,

third and fourth source/drain regions whose concentrations differ from said predetermined concentrations of each of said first and second source/drain regions are formed so as to connect to said first and second source/drain regions, respectively, after said side walls are formed, and

forming said first and second gate insulation films includes etching said first and second insulation films with masking by said first and second gate electrodes and said side walls.

9. A method of manufacturing a semiconductor device, the method, comprising:

forming a section separator region in a semiconductor substrate to separate said semiconductor substrate into a first region and a second region;

forming a first insulation film at said first region on said semiconductor substrate;

forming a first gate electrode material layer on said first insulation film;

forming a second insulation film whose thickness differs from a thickness of said first insulation film over an exposed surface after said first gate electrode material layer is formed;

forming a second gate electrode material layer on said second gate insulation film;

removing said second gate electrode material layer at said first region after said second gate electrode material layer is formed;

forming a first gate electrode with said first gate electrode material layer at said first region after said second gate electrode material layer is removed, while forming a second gate electrode with said second gate electrode material layer at said second region;

removing said second insulation film remaining on said first gate electrode after said first and second gate electrodes are formed;

forming first source/drain regions at said first region and second source/drain regions at said second region; and

etching said first and second insulation films with masking by said first and second gate electrodes to form first and second gate insulation films after said first and second source/drain regions are formed, wherein

each of said first and second source/drain regions has a predetermined concentration,

a plurality of side walls corresponding to said first and second gate electrodes are formed after said first and second source/drain regions are formed,

third and fourth source/drain regions whose concentrations differ from said predetermined concentration of each of said first and second source/drain regions, respectively, are formed so as to connect to said first and second source/drain regions, respectively, after said plurality of side walls is formed, and

forming said first and second gate insulation films includes etching said first and second insulation films with masking by said first and second gate electrodes and said plurality of side walls.

10. The method according to claim 9, wherein, said plurality of side walls comprise silicon oxide.

11. A method of manufacturing a semiconductor device, the method, comprising:

forming a section separator region in a semiconductor substrate to separate said semiconductor substrate into a first region and a second region;

forming a first insulation film at said first region on said semiconductor substrate;

forming a first gate electrode material layer on said first insulation film;

forming a second insulation film whose thickness differs from a thickness of said first insulation film over an exposed surface after said first gate electrode material layer is formed;

forming a barrier metal on said second insulation film;

forming a second gate electrode material layer on said barrier metal, wherein said second gate electrode material layer comprises at least one of a refractory metal and a refractory silicide and said barrier metal is disposed between said second gate electrode insulation film and said second gate electrode material layer;

removing said second gate electrode material layer at said first region after said second gate electrode material layer is formed;

forming a first gate electrode with said first gate electrode material layer at said first region after said second gate electrode material layer is removed, while forming a second gate electrode with said second gate electrode material layer at said second region;

removing said second insulation film remaining on said first gate electrode after said first and second gate electrodes are formed;

forming first source/drain regions at said first region and second source/drain regions at said second region; and

etching said first and second insulation films with masking by said first and second gate electrodes to form first and second gate insulation films after said first and second source/drain regions are formed.

12. A method of manufacturing a semiconductor device, the method, comprising:

forming a section separator region in a semiconductor substrate to separate said semiconductor substrate into a first region and a second region;

forming a first insulation film at said first region on said semiconductor substrate;

forming a first gate electrode material layer on said first insulation film;

forming a second insulation film whose thickness differs from a thickness of said first insulation film over an exposed surface at said second region after said first gate electrode material layer is formed and directly on said first gate electrode material layer at said first region;

forming a second gate electrode material layer on said second gate insulation film;

removing said second gate electrode material layer at said first region after said second gate electrode material layer is formed;

forming a first gate electrode with said first gate electrode material layer at said first region after said second gate electrode material layer is removed, while forming a second gate electrode with said second gate electrode material layer at said second region;

removing said second insulation film remaining on said first gate electrode after said first and second gate electrodes are formed;

forming first source/drain regions at said first region and second source/drain regions at said second region; and

etching said first and second insulation films with masking by said first and second gate electrodes to form first and second gate insulation films after said first and second source/drain regions are formed.

13. The method according to claim 12, wherein

each of said first and second source/drain regions has a predetermined concentration,

a plurality of side walls corresponding to said first and second gate electrodes are formed after said source/drain regions are formed,

third and fourth source/drain regions whose concentrations differ from said predetermined concentrations of each of said first and second source/drain regions are formed so as to connect to said first and second source/drain regions, respectively, after said side walls are formed, and

forming said first and second gate insulation films includes etching said first and second insulation films with masking by said first and second gate electrodes and said side walls.

14. The method according to claim 12, wherein said first gate electrode material layer comprises at least one of polysilcion and polycide.

15. The method according to claim 12, wherein said second gate electrode material layer includes at least one of a refractory metal and a refractory silicide.

16. The method according to claim 15, further comprising forming a barrier metal between said second gate electrode material layer of said at least one of said refractory metal and said refractory silicide and said second gate electrode insulation film.

17. The method according to claim 12, wherein said first insulation film is formed by oxidation.

18. The method according to claim 12, wherein said second insulation film is formed by oxidation.