Semiconductor device and method for manufacturing the same

• US 6,432,845 B1
• Filed: 11/23/1999
• Issued: 08/13/2002
• Est. Priority Date: 11/26/1998
• Status: Expired due to Fees

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Morozumi, Yokio
• Primary Examiner(s): Ho, Hoai V.
• Assistant Examiner(s): Le, Thao P.
• Application Number:
  US09/447,994
• Time in Patent Office: 994 Days
• Field of Search: 438/787, 438/789, 438/790, 438/597
• US Class Current: 438/789
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02203 the layer being porous
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31625 Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76804 by forming tapered via holes
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76864 Thermal treatment
• CPC Class Codes: H01L 21/76876 for deposition from the gas phase, e.g. CVD
• CPC Class Codes: H01L 21/76882 Reflowing or applying of pressure to better fill the contact hole

Abstract

A semiconductor device has a structure that is capable of reducing warping of a semiconductor wafer when the semiconductor device is manufactured. The semiconductor device is manufactured by a method including the steps for forming an interlayer dielectric film having an internal compression stress and an interlayer dielectric film having an internal tensile stress. As a result, when semiconductor devices are manufactured, the tensile stress and the compression stress act on the semiconductor wafer. As a consequence, the overall stress that acts on the semiconductor wafer are reduced to a small level or to zero, and thus warping of the semiconductor wafer is reduced or eliminated when semiconductor devices are manufactured.

Claims

1. A method for manufacturing a semiconductor device, the semiconductor device comprising a semiconductor substrate having a main surface, a plurality of wiring layers formed over the main surface, and a plurality of interlayer dielectric films formed over the main surface, wherein the plurality of interlayer dielectric films includes at least a first dielectric film and a second dielectric film, the method comprising at least the steps of:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first dielectric film composed of a silicon oxide film having an internal tensile stress; and

(b) forming the second dielectric film having an internal compression stress.

2. A method for manufacturing a semiconductor device according to claim 1, wherein the second dielectric film is a silicon oxide film formed by a CVD method.

3. A method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the first dielectric film includes, before the step (a), the step (c) of reacting a silicon compound with at least one of oxygen and a compound including oxygen by a CVD method to form a third silicon oxide film that serves as a base layer below the first dielectric film.

4. A method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the first dielectric film includes, after the step (a), a step (d) of reacting a silicon compound with at least one of oxygen and a compound including oxygen by a CVD method to form a fourth porous silicon oxide film on the first dielectric film.

5. A method for manufacturing a semiconductor device according to claim 1, after forming the first dielectric film, further comprising the steps of:

(e) forming a first through hole in the first dielectric film;

(f) forming a barrier layer, that defines a part of the wiring layers, on a surface of the first through hole and on a surface of the first dielectric film; and

(g) forming a conductive film, that forms a part of the wiring layers, on a surface of the barrier layer.

6. A method for manufacturing a semiconductor device according to claim 5, wherein the first through hole has an upper end section, a bottom end section and a tapered wall between the upper end section and the bottom end section wherein aperture diameters thereof become smaller from the upper end section toward the bottom end section thereof.

7. A method for manufacturing a semiconductor device according to claim 5, wherein the conductive film is provided by forming a first aluminum film formed from aluminum or an alloy containing aluminum as a main component at temperatures of about 200°

C. or lower, and then, forming a second aluminum film formed from aluminum or an alloy containing aluminum as a main component at temperatures of about 300°

C. or higher.

8. A method for manufacturing a semiconductor device according to claim 1, wherein the silicon compound used in the step (a) is at least one selected from a group containing inorganic silane compounds and organo silane compounds.

9. A method for manufacturing a semiconductor device according to claim 1, wherein the silicon compound used in the step (a) is at least one selected from a group of inorganic silane compounds including monosilane, disilane, SiH₂Cl₂ and SiF₄, and a group of organo silane compounds including CH₃SiH₃, tripropylesilane, tetraethylorthosilicate.

10. A method for manufacturing a semiconductor device according to claim 8, wherein the step (a) uses an inorganic silane compound as the silicon compound and is conducted at temperatures ranging from about 0°

C. to about 20°

C. by a reduced pressure CVD method.

11. A method for manufacturing a semiconductor device according to claim 8, wherein the step (a) uses an organic silane compound as the silicon compound and is conducted at temperatures ranging from about 0°

C. to about 150°

C. by a reduced pressure CVD method.

12. A method for manufacturing a semiconductor device according to claim 4, wherein the step (d) is conducted at temperatures ranging from about 300°

C. to about 450°

C. by a plasma CVD method.

13. A method for manufacturing a semiconductor device according to claim 12, wherein the compound containing oxygen used in the step (d) is nitrogen monoxide.

14. A method for manufacturing a semiconductor device according to claim 4, wherein the step (d) is conducted at temperatures ranging from about 300°

C. to about 550°

C. by a normal pressure CVD method.

15. A method for manufacturing a semiconductor device according to claim 14, wherein the compound containing oxygen used in the step (d) is ozone.

16. A method for manufacturing a semiconductor device according to claim 4, wherein, in the step (d), the first silicon oxide film is exposed to an ozone atmosphere before the fourth silicon oxide film is formed.

17. A method for manufacturing a semiconductor device according to claim 1, wherein, after the second dielectric film is formed, the second dielectric film is polished by a CMP method to planarize a top surface thereof.

34. A method for manufacturing a semiconductor device according to claim 1, wherein a magnitude of the internal tensile stress is approximately equal to a magnitude of the internal compression stress.

36. A method for manufacturing a semiconductor device according to claim 1, wherein step (a) further comprises:

polycondensation reacting a silicon compound with hydrogen peroxide by a CVD method to form the first dielectric film composed of a silicon oxide film having an internal tensile stress, wherein the first dielectric film is part of the first interlayer dielectric film.

37. A method for manufacturing a semiconductor device according to claim 1, wherein step (a) further comprises, comprises:

polycondensation reacting a silicon compound with hydrogen peroxide by a CVD method to form the first silicon oxide film having an internal tensile stress, wherein the first silicon oxide film is part of the first interlayer dielectric film.

18. A method for manufacturing a semiconductor device, the semiconductor device comprising a semiconductor substrate having a main surface, a plurality of wiring layers over the main surface, and interlayer dielectric films formed between the main surface and the plurality of wiring layers and between the wiring layers,

wherein at least one of the interlayer dielectric films is an interlayer dielectric film including a first silicon oxide film, and

at least another of the interlayer dielectric films is an interlayer dielectric film including a second silicon oxide film, the method comprising at least the steps of:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first silicon oxide film having an internal tensile stress; and

(b) forming by a CVD method the second silicon oxide film having an internal compression stress.

19. A method for manufacturing a semiconductor device according to claim 18, wherein the step of forming the interlayer dielectric film including the first silicon oxide film includes, before the step (a), a step (c) of reacting a silicon compound with at least one of oxygen and a compound including oxygen by a CVD method to form a third silicon oxide film that serves as a base layer.

20. A method for manufacturing a semiconductor device according to claim 18, wherein the step of forming the interlayer dielectric film including the first silicon oxide film includes, after the step (a), a step (d) of reacting a silicon compound with at least one of oxygen and a compound including oxygen by a CVD method to form a fourth porous silicon oxide film.

21. A method for manufacturing a semiconductor device according to claim 18, after forming the interlayer dielectric film including the first silicon oxide film, further comprising the steps of:

(e) forming a first through hole in the interlayer dielectric film including the first silicon oxide film;

(f) forming a barrier layer, that defines a part of the wiring layers, on a surface of the first through hole and on a surface of the interlayer dielectric film; and

(g) forming a conductive film, that forms a part of the wiring layers, on a surface of the barrier layer.

22. A method for manufacturing a semiconductor device according to claim 21, wherein the first through hole has a tapered shape wherein aperture diameters thereof become smaller from an upper end section thereof toward a bottom end section thereof.

23. A method for manufacturing a semiconductor device according to claim 21, wherein the conductive film is provided by forming a first aluminum film formed from aluminum or an alloy containing aluminum as a main component at temperatures of about 200°

C. or lower, and then, forming a second aluminum film formed from aluminum or an alloy containing aluminum as a main component at temperatures of about 300°

C. or higher.

24. A method for manufacturing a semiconductor device according to claim 18, wherein the silicon compound used in the step (a) is at least one selected from a group containing inorganic silane compounds and organo silane compounds.

25. A method for manufacturing a semiconductor device according to claim 18, wherein the silicon compound used in the step (a) is at least one selected from a group of inorganic silane compounds including monosilane, disilane, SiH₂Cl₂ and SiF₄, and a group of organo silane compounds including CH₃SiH₃, tripropylesilane, tetraethylorthosilicate.

26. A method for manufacturing a semiconductor device according to claim 24, wherein the step (a) uses an inorganic silane compound as the silicon compound and is conducted at temperatures ranging from about 0°

C. to about 20°

C. by a reduced pressure CVD method.

27. A method for manufacturing a semiconductor device according to claim 24, wherein the step (a) uses an organic silane compound as the silicon compound and is conducted at temperatures ranging from about 0°

C.-150°

C. by a reduced pressure CVD method.

28. A method for manufacturing a semiconductor device according to claim 20, wherein the step (d) is conducted at temperatures ranging from about 300 to about 450°

C. by a plasma CVD method.

29. A method for manufacturing a semiconductor device according to claim 28, wherein the compound containing oxygen used in the step (d) is nitrogen monoxide.

30. A method for manufacturing a semiconductor device according to claim 20, wherein the step (d) is conducted at temperatures ranging from about 300°

C. to about 550°

C. by a normal pressure CVD method.

31. A method for manufacturing a semiconductor device according to claim 30, wherein the compound containing oxygen used in the step (d) is ozone.

32. A method for manufacturing a semiconductor device according to claim 20, wherein, in the step (d), the first silicon oxide film is exposed to an ozone atmosphere before the fourth silicon oxide film is formed.

33. A method for manufacturing a semiconductor device according to claim 18, wherein, after the interlayer dielectric film including the second silicon oxide film is formed, the interlayer dielectric film is polished by a CMP method.

35. A method for manufacturing a semiconductor device according to claim 18, wherein a magnitude of the internal tensile stress is approximately equal to a magnitude of the internal compression stress.

38. A method for manufacturing a semiconductor device, the semiconductor device comprising a semiconductor substrate having a main surface, a plurality of wiring layers formed over the main surface, and a plurality of interlayer dielectric films formed over the main surface, wherein at least one of the plurality of interlayer dielectric films is multi-layered and includes at least one of a first dielectric film and a second dielectric film, the method comprising:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first dielectric film composed of a silicon oxide film having an internal tensile stress; and

(b) forming the second dielectric film having an internal compression stress.

39. A method for manufacturing a semiconductor device according to claim 38, wherein the plurality of interlayer dielectric films includes a first interlayer dielectric film including at least a first dielectric film and a second interlayer dielectric film including at least a second dielectric film, and wherein one of the first interlayer dielectric film and the second interlayer dielectric film is multilayered.

40. A method for manufacturing a semiconductor device according to claim 38, wherein the first interlayer dielectric film is multi-layered, and wherein the step (a) comprises:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first dielectric film composed of a silicon oxide film having an internal tensile stress, wherein the first dielectric film comprises at least one layer of the first interlayer dielectric film.

41. A method for manufacturing a semiconductor device according to claim 38, wherein the second interlayer dielectric film is multi-layered, and wherein the step (b) comprises:

(b) forming the second dielectric film having an internal compression stress, wherein the second dielectric film comprises at least one layer of the second interlayer dielectric film.

42. A method for manufacturing a semiconductor device according to claim 38, wherein both the first interlayer dielectric film and the second interlayer dielectric film are multi-layered, and wherein steps (a) and (b) comprise:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first dielectric film composed of a silicon oxide film having an internal tensile stress, wherein the first dielectric film comprises at least one layer of the first interlayer dielectric film; and

(b) forming the second dielectric film having an internal compression stress, wherein the second dielectric film comprises at least one layer of the second interlayer dielectric film.

43. A method for manufacturing a semiconductor device, the semiconductor device comprising a semiconductor substrate having a main surface, a plurality of wiring layers formed over the main surface, and a plurality of interlayer dielectric films formed over the main surface, wherein the plurality of interlayer dielectric films includes a first interlayer dielectric film at least a first dielectric film and a second film, the method comprising at least the steps of:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first dielectric film composed of a silicon oxide film having an internal tensile stress, wherein each of the interlayer dielectric films are multi-layered and the first silicon oxide film comprises at least one layer of the first interlayer dielectric film; and

(b) forming the second film having an internal compression stress.

44. A method for manufacturing a semiconductor device, the semiconductor device comprising a semiconductor substrate having a main surface, a plurality of wiring layers over the main surface, and interlayer dielectric films formed between the main surface and the plurality of wiring layers and between the wiring layers,

wherein at least one of the interlayer dielectric films is a first interlayer dielectric film including a first silicon oxide film, and

at least another of the interlayer dielectric films is a second interlayer dielectric film including a second film, the method comprising at least the steps of:

(a) reacting a silicon compound with hydrogen peroxide by a CVD method to form the first silicon oxide film having an internal tensile stress, wherein each of the interlayer dielectric films are multi-layered and the first silicon oxide film comprises at least one layer of the first interlayer dielectric film; and

(b) forming by a CVD method the second film having an internal compression stress.

45. A method for manufacturing a semiconductor device, comprising:

providing a semiconductor substrate having a main surface;

providing a multi-layered interlayer dielectric film over the main surface, wherein the multi-layered interlayer dielectric film includes a first silicon oxide film layer having an internal tensile stress; and

providing a second interlayer dielectric film over the main surface, the second interlayer dielectric film having an internal compression stress.

46. A method for manufacturing a semiconductor device according to claim 45, wherein the first silicon oxide film layer is formed by reacting a silicon compound with hydrogen peroxide by a CVD method.

47. A method for manufacturing a semiconductor device according to claim 45, wherein a magnitude of the internal tensile stress is approximately equal to a magnitude of the internal compression stress.