CMOS/CCD line transfer imager with low dark current
First Claim
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1. Apparatus, comprising:
- a plurality of detectors arranged as a plurality of lines, for receiving image information and providing a proportionate level of charge therefrom;
a plurality of cells forming a charge coupled device (CCD) register, each of said detectors having associated with it a respective cell;
a drain gate, for controllably removing charge from said plurality of cells; and
a controller, for causing said drain gate to sequentially remove residual charge from said cells along one of said plurality of lines at a time, causing said cells to receive charge levels proportionate to said respective detectors, and retrieve charge-level indicative information from said cells.
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Abstract
A method and apparatus for low light imaging in which a plurality of relatively small detectors forming a line is coupled to a respective cell of a CCD register. A charge indicative of detected image information is provided to the respective cells after the cells are substantially discharged via a drain. The register is read by a control element to define therefrom a row of pixel information.
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Citations
28 Claims
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1. Apparatus, comprising:
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a plurality of detectors arranged as a plurality of lines, for receiving image information and providing a proportionate level of charge therefrom;
a plurality of cells forming a charge coupled device (CCD) register, each of said detectors having associated with it a respective cell;
a drain gate, for controllably removing charge from said plurality of cells; and
a controller, for causing said drain gate to sequentially remove residual charge from said cells along one of said plurality of lines at a time, causing said cells to receive charge levels proportionate to said respective detectors, and retrieve charge-level indicative information from said cells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
said detectors and said respective focusing elements are arranged as said plurality of lines forming thereby a detector array, wherein each of said plurality of detector lines has associated with it a respective register; and
said controller processing each of said detector lines in sequence by discharging said respective register, causing each cell within said respective register to receive charge from a corresponding detector, and retrieving charge-indicative information from said register.
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6. The apparatus of claim 1, wherein a drain and dump gate is formed proximate said plurality of detectors to controllably provide dark current reduction and blooming control.
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7. The apparatus of claim 6, wherein said drain and dump gates are used to provide shutter control.
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8. The apparatus of claim 1, wherein said detectors comprise one of a pinned virtual gage detector or a diode detector.
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9. The apparatus of claim 1, wherein said detectors are responsive to one of visible light and infrared radiation.
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10. The apparatus of claim 1, further comprising:
an amplifier, coupled between said CCD register and said controller, for adapting a signal level to charge levels of said CCD register cells.
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11. The apparatus of claim 10, wherein said amplifier comprises a floating diffusion amplifier.
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12. Apparatus, comprising:
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a plurality of detectors arranged as a plurality of lines for receiving image information and providing a proportionate level of charge therefrom;
a plurality of cells forming a charge coupled device (CCD) register, each of said detectors having associated with it a respective cell; and
a controller, for sequentially removing residual charge from said cells along one of said plurality of lines at a time, causing said cells to receive charge levels proportionate to said respective detectors, and retrieving charge-level indicative information from said cells. - View Dependent Claims (13, 14, 15, 16, 17, 18)
a scan converter, for adapting the scan rate of the retrieved charge-level indicative information from the cells and adapting said scan rate to the predetermined scan rate.
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19. An integrated circuit formed using a complementary metal-oxide semiconductor/charge coupled device (CMOS/CCD) process on a common substrate, said integrated circuit comprising:
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a plurality of detectors arranged as a plurality of lines for receiving image information and providing a proportionate level of charge therefrom;
a plurality of cells forming a charge coupled device (CCD) register, each of said detectors having associated with it a respective cell;
a drain gate, for controllably removing charge from said plurality of cells; and
a controller, for causing said drain gate to sequentially remove residual charge from said cells along one of said plurality of lines at a time, causing said cells to receive charge levels proportionate to said respective detectors, and retrieve charge-level indicative information from said cells. - View Dependent Claims (20, 21, 22, 23)
said detectors and said respective focusing elements are arranged as said plurality of lines forming thereby a detector array wherein each of said plurality of detector lines has associated with it a respective register;
said controller processing each of said detector lines in sequence by discharging said respective register, causing each cell within said respective register to receive charge from a corresponding detector, and retrieving charge-indicative information from said register.
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24. A method, comprising the steps of:
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clearing dark current from a charge coupled device (CCD) register;
loading detector signals into corresponding cells within the CCD register;
retrieving the contents of the CCD register; and
repeating the preceding steps for each line of a CCD array. - View Dependent Claims (25, 26, 27)
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28. A method, comprising:
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sequentially accessing each pair of adjacent lines of charge coupled device (CCD) cells within an array of CCD cells, each cell receiving image indicative charge from a respective detector;
for each pair of adjacent lines of CCD cells, said accessing operating to retrieve image indicative charge from a first adjacent line of CCD cells and to clear dark current from a second line of CCD cells, said first adjacent line of CCD cells having been substantially cleared of dark current by an immediately preceding access.
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Specification