Offset error compensation of input signals in analog-to-digital converter

• US 6,433,712 B1
• Filed: 07/25/2001
• Issued: 08/13/2002
• Est. Priority Date: 07/25/2001
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Ohnhaeuser, Frank, Oljaca, Miroslav
• Primary Examiner(s): YOUNG, BRIAN K
• Application Number:
  US09/912,992
• Time in Patent Office: 384 Days
• Field of Search: 341/118, 341/155, 341/119, 341/120, 341/121
• US Class Current: 341/118
• CPC Class Codes: H03M 1/1019 by storing a corrected or correction value in a digital look-up table
• CPC Class Codes: H03M 1/1023 Offset correction H03M1/1019 takes precedence; removal of offset already present on the analogue input signal H03M1/1295
• CPC Class Codes: H03M 1/442 using switched capacitors
• CPC Class Codes: H03M 1/468 in which the input S/H circuit is merged with the feedback DAC array
• CPC Class Codes: H03M 3/384 Offset correction removal of offset already present on the analogue input signal H03M3/494
• CPC Class Codes: H03M 3/458 Analogue/digital converters using delta-sigma modulation as an intermediate step

Abstract

An analog-to-digital converter receiving an analog input signal (V_IN) including an offset component, and includes a switched capacitor input circuit (101) configured to sample the analog input signal (V_IN) to produce and store a signal representative of the sampled input signal between a first conductor (17) and a second conductor (27). A conversion circuit (1) is coupled to the first conductor (27) and the switched capacitor input circuit (101) to produce a digital output signal (DATA OUT). An offset correction circuit (4) includes an output coupled to the second conductor (27) and an input receiving a digital offset correction signal (DATA IN), the offset correction circuit (4) including a switched capacitor correction circuit (4A) operative in response to the offset correction control signal (DATA IN) to transfer charge to/from the second conductor (27). The conversion circuit (1) operates in response to adjustment by the offset correction circuit (4) of a signal conducted by the second conductor (27) to produce the digital output signal (DATA OUT) compensated for the offset component.

Claims

1. An analog-to-digital converter receiving an analog input signal including an offset component, the analog-to-digital converter comprising:

(a) a switched capacitor input circuit configured to sample the analog input signal to produce and store a signal representative of the sampled input signal between a first conductor and a second conductor;

(b) a conversion circuit coupled to the first conductor and the switched capacitor input circuit and configured to produce a digital output signal representative of the analog input signal;

(c) an offset correction circuit having an output coupled to the second conductor and an input receiving a digital offset correction signal, the offset correction circuit including a switched capacitor correction circuit operative in response to the offset correction control signal to transfer charge to/from the second conductor;

(d) the conversion circuit being operative in response to adjustment by the offset correction circuit of a signal conducted by the first conductor to produce the digital output signal compensated for the offset component.

2. The analog-to-digital converter of claim 1, wherein the analog-to-digital converter includes SAR (successive approximation register) analog-to-digital conversion circuitry.

3. The analog-to-digital converter of claim 1, wherein the analog-to-digital converter includes delta-sigma analog-to-digital conversion circuitry.

4. The analog-to-digital converter of claim 1, wherein the analog-to-digital converter includes pipeline analog-to-digital conversion circuitry.

5. The analog-to-digital converter of claim 2 wherein the analog input signal is a differential signal, and wherein the switched capacitor input circuit includes a first section including a first input terminal and a second section including a second input terminal, the differential input signal being applied between the first input terminal and the second input terminal.

6. The analog-to-digital converter of claim 2 wherein the analog input signal is a single-ended signal, and wherein the switched capacitor input circuit includes a first section including a first input terminal and a second section including a second input terminal, the second input terminal being connected to a constant reference voltage, the single-ended signal being applied to the first input terminal and the constant reference voltage being applied to the second input terminal.

7. The analog-to-digital converter of claim 2 wherein the analog input signal is a single-ended signal, and wherein the switched capacitor input circuit includes a first section including a first input terminal and a second section including a second input terminal, the first input terminal being connected to a constant reference voltage, the single-ended signal being applied to the second input terminal and the constant reference voltage being applied to the first input terminal.

8. The analog-to-digital converter of claim 5 wherein the first section includes a first switch coupled between the first input terminal and a first terminal of a first input capacitor and a second switch configured to selectively couple the first terminal of the first input capacitor to either a first reference voltage or a second reference voltage, a second terminal of the first input capacitor being coupled by a second conductor to a first input of a comparator.

9. The analog-to-digital converter of claim 8 wherein the second section includes a third switch coupled between the second input terminal and a first terminal of a second input capacitor and a fourth switch coupled between the first reference voltage and the first conductor, the first conductor being coupled to a second input of the comparator.

10. The analog-to-digital converter of claim 9 wherein the first section of the switched capacitor input stage includes a first group of binarily weighted capacitors each having a first terminal coupled to a corresponding switch, respectively, for selectively coupling the first terminal of that capacitor to either the first reference voltage or the second reference voltage, and a second terminal coupled to the second conductor.

11. The analog-to-digital converter of claim 9 wherein the offset correction circuit includes a second group of binarily weighted capacitors each having a first terminal coupled to a corresponding switch, respectively, for selectively coupling the first terminal of that capacitor to either the first reference voltage or the second reference voltage, and a second terminal coupled to the first conductor.

12. The analog-to-digital converter of claim 1 wherein the digital output signal is received by a control circuit which operates to measure and store peak values of the input signal and compute a magnitude and polarity of the offset component of the input signal, and produce a corresponding value of the offset correction control signal.

13. The analog-to-digital converter of claim 12 wherein the control circuit is an external control circuit which includes a data processing circuit.

14. The analog-to-digital converter of claim 13 wherein the data processing circuit includes a digital signal processor (DSP).

15. The analog-to-digital converter of claim 13 wherein the data processing circuit includes a microprocessor.

16. A method of avoiding loss of resolution in conversion of an analog input signal having an offset component to a digital signal, the method comprising:

(a) determining a magnitude of the offset component;

(b) producing an offset compensation control signal representative of the magnitude of the offset component; and

(c) controlling a transfer of offset compensation charge into or out of a conductor in a switched capacitor input circuit of an analog-to-digital converter to adjust a signal representative of the analog input voltage being conducted by the first conductor so as to cause a conversion circuit of the analog-to-digital converter to produce a digital output signal having a full-scale value equal to the magnitude of the analog input signal plus or minus the magnitude of the offset component.

17. The method of claim 16 wherein step (a) includes determining the polarity of the offset component.

18. The method of claim 17 wherein step (a) includes measuring minimum and maximum peak values of the analog input signal by means of the analog-to-digital converter and using the peak values to compute a magnitude of the offset component and a polarity of the offset component and using the computed magnitude and polarity to produce the offset compensation signal.

19. The method of claim 17 wherein step (a) includes measuring a steady state value of the analog input signal to produce a value of the digital signal representative of the magnitude and polarity of the offset component.

20. The method of claim 17 wherein step (a) includes measuring a steady state value of the analog input signal to produce a value of the digital signal representative of the magnitude and polarity of the offset component if a transducer producing the analog input signal is controlled to produce a steady-state value which represents the offset component, and wherein step (a) includes measuring minimum and maximum peak values of the analog input signal by means of the analog-to-digital converter and using the peak values to compute a magnitude of the offset component and a polarity of the offset component and using the computed magnitude and polarity to produce the offset compensation signal if a transducer producing the analog input signal is not controlled to produce a steady-state value which represents the offset component.

21. An analog-to-digital conversion system for avoiding loss of resolution in conversion of an analog input signal having an offset component to a digital signal, comprising:

(a) means for determining a magnitude of the offset component;

(b) means for producing an offset compensation control signal representative of the magnitude of the offset component; and

(c) means for controlling a transfer of offset compensation charge into or out of a conductor in a switched capacitor input circuit of an analog-to-digital converter to adjust a signal representative of the analog input voltage being conducted by the first conductor so as to cause a conversion circuit of the analog-to-digital converter to produce a digital output signal having a full-scale value equal to the magnitude of the analog input signal plus or minus the magnitude of the offset component.

22. The analog-to-digital conversion system of claim 21 wherein the means for determining a magnitude of the offset component also determines the polarity of the offset component.

23. The analog-to-digital conversion system of claim 21 wherein the means for producing an offset compensation control signal includes means for measuring minimum and maximum peak values of the analog input signal by means of the analog-to-digital converter and using the peak values to compute a magnitude of the offset component and a polarity of the offset component and using the computed magnitude and polarity to produce the offset compensation signal.

24. The analog-to-digital conversion system of claim 22 wherein the means for determining a magnitude and polarity of the offset component includes means for measuring a steady state value of the analog input signal to produce a value of the digital signal representative of the magnitude and polarity of the offset component.

25. The analog-to-digital conversion system of claim 22 wherein the means for determining a magnitude and polarity of the offset component includes means for measuring a steady state value of the analog input signal to produce a value of the digital signal representative of the magnitude and polarity of the offset component if a transducer producing the analog input signal is controlled to produce a steady-state value which represents the offset component, and means for measuring minimum and maximum peak values of the analog input signal by means of the analog-to-digital converter and using the peak values to compute a magnitude of the offset component and a polarity of the offset component and using the computed magnitude and polarity to produce the offset compensation signal if a transducer producing the analog input signal is not controlled to produce a steady-state value which represents the offset component.