Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems

• US 6,434,034 B1
• Filed: 06/22/2001
• Issued: 08/13/2002
• Est. Priority Date: 04/11/1991
• Status: Expired due to Fees

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Harari, Eliyahou, Wallace, Robert F., Norman, Robert D.
• Primary Examiner(s): MAI, SON LUU
• Application Number:
  US09/888,167
• Time in Patent Office: 417 Days
• Field of Search: 365/185.33, 365/52, 365/63, 711/103, 711/115
• US Class Current: 365/52
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system
• CPC Class Codes: G06K 19/07732 the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks housings for electrical equipment in general, see H05K5/02
• CPC Class Codes: G06K 19/07741 comprising a first part operating as a regular record carrier and a second attachable part that changes the functional appearance of said record carrier, e.g. a contact-based smart card with an adapter part which, when attached to the contact card makes the contact card function as a non-contact card
• CPC Class Codes: G06K 19/07743 External electrical contacts
• CPC Class Codes: G06K 7/0047 for reading/sensing record carriers having edge contacts
• CPC Class Codes: G11C 5/04 Supports for storage elements , e.g. memory modules; Mounting or fixing of storage elements on such supports
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83385 Shape, e.g. interlocking features
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H05K 1/141 One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 2201/10159 Memory
• CPC Class Codes: H05K 2201/10462 Flat component oriented parallel to the PCB surface
• CPC Class Codes: H05K 2201/10484 Obliquely mounted
• CPC Class Codes: H05K 2203/1572 Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
• CPC Class Codes: H05K 3/3421 : Leaded components
• CPC Class Codes: H05K 7/1431 : Retention mechanisms for CPU modules

Abstract

A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard computer system bus. Alternately, each card can be provided with the necessary controller circuitry and thus is connectable directly to the computer system bus. An electronic system is described for a memory system and its controller within a single memory card. In a preferred physical arrangement, the cards utilize a main circuit board with a plurality of sub-boards attached thereto on both sides, each sub-board carrying several integrated circuit chips.

Claims

1. For use with a memory controller having a connector to removably receive a memory card and adapted (1) to receive address, user data and command signals from a host system according to a given protocol and (2) provide user data and status signals to the host system according to said given protocol, said controller including at least one microprocessor that executes commands from the host to operated the memory card and a buffer memory that temporarily stores user data being written to or read from an addressed portion of a memory card, the memory card comprising:

a connector that mechanically mates with the controller connector to provide a removable electrical connection between the controller and the card, said card connector being connected to an integrated circuit array of floating gate memory cells organized in groups of cells that are individually addressable for simultaneous erasure of the cells of a group, said memory card additionally being formed in a package having a width less that 5.5 centimeters and length less than 9.0 centimeters, and

a serial communications circuits connected with the card connector to transfer user data through the card connector between the buffer memory of said controller and at least one of said memory cell groups accessed in accordance with an address received from the controller through the memory card connector.

2. The memory card of claim 1, additionally comprising a register connected to the serial communication circuit to transfer data serially therethrough and connected to the memory cell array to transfer user data in parallel therebetween.

3. The memory card of claim 1 wherein individual ones of the groups of memory cells within the memory card that are simultaneously erasable include enough cells to store 512 bytes of user data plus overhead to the sector and the user data stored therein.

4. The memory card of any one of claims 1-3, wherein the memory cells of the integrated circuit array are individually programmable into exactly two states in order to store exactly one bit of data per cell.

5. The memory card of any one of claims 1-3, wherein the memory cells of the integrated circuit array individually programmable into more than two states in order to store more than one bit data per cell.

6. A portable data storage device, comprising:

a card having a non-volatile integrated circuit memory cell array encased therein and a plurality of electrical contacts accessible from outside the card in a manner to be contacted when inserted into a mating receptacle, the card having a width less than 5.5 centimeters, a length less than 9.0 centimeters, and thickness less than 6.0 millimeters, and

a data communication circuit encased within the card, said communication circuit being connected to transfer data serially through the electrical contacts and with the integrated circuit memory cell array.

7. The device of claim 6, wherein the data communication circuit includes a register connected to transfer data serially through the external electrical contacts and in parallel with the integrated circuit memory cell array.

8. The device of claim 7, wherein the data communication circuit transfer data into the card through two of the plurality of electrical contacts and transfers data out of the card through a different two of the plurality of electrical contacts.

9. The device of claim 6, wherein the integrated circuit memory cell array is a flash EEPROM type.

10. The memory card of any one of claims 6-9, wherein the memory cells of the integrated circuit array are individually programmable into exactly two states on order to store exactly one bit of data per cell.

11. The memory card of any one of claims 6-9, wherein the memory cells of the integrated circuit array are individually programmable into more than two states in order to store more than one bit of data per cell.

12. A memory card, comprising:

an array of flash EEPROM memory cells encased within the card,

a plurality of electrical contacts accessible from outside the card in a manner to be contacted when inserted into a mating receptacle, and

a data register encased within the card, said data register being connected serially with the electrical contacts in order to serially transfer data between the data register and outside of the card, said data register further being connected in parallel with the array of memory cells in order to transfer data in parallel between the data register and the array of memory cells.

13. The memory card of claim 12, wherein said card has a width less than 5.5 centimeters, a length less than 9.0 centimeters, and a thickness less than 6.0 millimeters.

14. The memory card of claim 12, wherein the memory cells of the integrated circuit array are individually programmable into more than two states in order to store more than one bit of data per cell.

15. A memory card, comprising:

an array of non-volatile memory cells encased within the card,

a plurality of electrical contacts accessible from outside the card in a manner to be contacted when inserted into a mating receptacle, the card having a width less than 5.5 centimeters, a length less than 9.0 centimeters, and a thickness less than 6.0 millimeters,

a serial data link encased within the card and connected with less than all of the electrical contacts,

a data register encased within the card, said data register being connected to transfer data serially through said serial data link to and from outside of the card, said data register also being connected in parallel with the array of non-volatile memory cells to program data thereinto and read data therefrom in parallel,

a command register encased within the card and connected to serially receive commands through said serial data link from outside of the card, and

a command decoder connected in parallel with the command register to receive and decode commands from the command register.

16. The memory card of claim 15, which additionally comprises an address register encased within the card, said address register being connected to serially received addresses through said serial data link from outside the card and to apply said addresses in parallel to the array of non-volatile memory cell.

17. The memory card of claim 15, wherein the memory cells of the integrated circuit array are individually programmable into more than two states in order to store more than one bit of data per cell.

18. The memory card of claim 15, wherein memory cell array is a flash EEPROM type.