Power consumption reduction in medical devices employing multiple supply voltages and clock frequency control

• US 6,434,425 B1
• Filed: 09/25/2001
• Issued: 08/13/2002
• Est. Priority Date: 04/29/1998
• Status: Expired due to Fees

• Current Assignee: Medtronic Incorporated (Medtronic Plc)
• Original Assignee: Medtronic Incorporated (Medtronic Plc)
• Inventors: Thompson, David L.
• Primary Examiner(s): EVANISKO, GEORGE ROBERT
• Application Number:
  US09/962,983
• Publication Number:
  US 20020035383A1
• Time in Patent Office: 322 Days
• Field of Search: 607/1, 607/2, 607/4, 607/5, 607/7, 607/16
• US Class Current: 607/16
• CPC Class Codes: A61N 1/3605 Implantable neurostimulators for stimulating central or peripheral nerve system
• CPC Class Codes: A61N 1/362 Heart stimulators heart defibrillators A61N1/39
• CPC Class Codes: A61N 1/372 Arrangements in connection with the implantation of stimulators
• CPC Class Codes: A61N 1/378 Electrical supply

Abstract

Power consumption in medical devices is reduced through the operation of circuits at clock speeds of lower levels to adequately complete desired functions during predetermined time periods (e.g., blanking interval, upper rate interval, etc.) just-in-time prior to subsequent required functional processes; by providing supply voltages tailored for various circuits of an integrated circuit; by operating two or more circuits of an integrated circuit at different clock frequencies; by changing the supply voltage level “on the fly” as required by specific circuit timing functions required for various circuitry based on clock frequencies used to control operation of such circuitry; and/or by tailoring back gate bias or adjusting back gate bias “on the fly” for circuits based on the supply voltage level applied to the circuits.

Claims

1. A method of limiting power consumption in a medical device having a plurality of circuits, comprising:

operating the plurality of circuits at predetermined clock speeds;

operating the plurality of circuits at predetermined supply voltage levels;

operating at least two or more of the plurality of circuits at different clock speeds;

changing the supply voltage levels on the fly as required by specific circuit timing functions being performed by the plurality of circuits and the operating clock speeds; and

adjusting back gate bias on the fly for the plurality of circuits based on the supply voltage levels applied to the circuits.

2. The method according to claim 1 wherein operating the plurality of circuits at predetermined clock speeds involves activation of a circuit to perform at least one function during substantially an entire predetermined time period, and wherein the function is completed just prior to a subsequent time period.