Charge-pump circuit and control method thereof

• US 6,437,637 B2
• Filed: 05/30/2001
• Issued: 08/20/2002
• Est. Priority Date: 05/30/2000
• Status: Expired due to Fees

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Myono, Takao
• Primary Examiner(s): Lam, Tuan T.
• Assistant Examiner(s): Nguyen, Hiep
• Application Number:
  US09/870,318
• Publication Number:
  US 20010052812A1
• Time in Patent Office: 447 Days
• Field of Search: 327/534, 327/536, 327/390, 327/589, 327/157, 363/59, 363/60, 323/313
• US Class Current: 327/536
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type

Abstract

A charge-pump circuit has means biasing electrical potential of a substrate of a MOS transistor for control M2 so that forward direction current does not flow substantially through a,parasitic diode Dp1. In the concrete, the substrate of the substrate of a MOS transistor for control M2 is biased by voltage of a connecting point of the substrate of a MOS transistor for control M2 and a capacitor 1 at the case that the substrate of a MOS transistor for control M2 is P-channel type. Thus, it is prevented that a parasitic diode is biased to forward direction in a charge-pump circuit carrying out voltage fluctuation with lower voltage step than power source voltage Vdd so as to carry out normally charge-pump operation.

Claims

1. A charge-pump circuit comprising:

at least first and second electrical charge transfer devices connected in series;

first and second capacitors;

clock supplying means supplying clock to one end of the second capacitor;

first switching means for connecting said first and second capacitors to a connecting point of the first and second electrical charge transfer devices in series; and

second switching means for connecting said first and second capacitors to the connecting point of the first and second electrical charge transfer device in parallel,

wherein at least said first switching means consists of a MOS transistor for control and the charge-pump circuit has means for biasing a substrate of the MOS transistor for control so that forward direction current does not flow substantially through a parasitic diode accompanying the MOS transistor for control.

2. A charge-pump circuit according to claim 1, wherein said MOS transistor for control is P-channel type and the substrate of the MOS transistor for control is biased by voltage of the connecting point of the MOS transistor for control and said first capacitor.

3. A charge-pump circuit according to claim 1, wherein said MOS transistor for control is P-channel type and the substrate of the MOS transistor for control is biased by output of said clock supplying means.

4. A charge-pump circuit according to claim 1, wherein said MOS transistor for control is N-channel type and the substrate of the MOS transistor for control is biased by voltage of the connecting point of the MOS transistor for control and said second capacitor.

5. A charge-pump circuit according to claim 1, wherein said MOS transistor for control is N-channel type and the substrate of the MOS transistor for control is biased by voltage of the connecting point of said first and second electric charge transfer devices.

6. A charge-pump circuit according to any of claim 1 to claim 5, wherein each of said electrical charge transfer device consists of a MOS transistor for electrical charge transfer.

7. A method for controlling of charge-pump circuit comprising the step of:

at least first and second electrical charge transfer devices connected in series;

first and second capacitors;

clock supplying means supplying clock to one end of the second capacitor;

first switching means for connecting said first and second capacitors to a connecting point of the first and second electrical charge transfer devices in series; and

second switching means for connecting said first and second capacitors to the connecting point of the first and second electrical charge transfer device in parallel, in which at least said first switching means consists of a MOS transistor for control and the charge-pump circuit has means for biasing a substrate of the MOS transistor for control so that forward direction current does not flow substantially through a parasitic diode accompanying the MOS transistor for electrical charge transfer, said method for controlling further comprising a step of changing state of said clock by said clock supplying means after said first and second switching means turn off.

8. A method for controlling of charge-pump circuit according to claim 7, further comprising steps of:

a first step turning said first and second switching means off;

a second step changing said clock to a second state from a first state by said clock supplying means;

a third step connecting said first and second capacitors in series by turning said first switching means on;

a fourth step turning said first switching means off;

a fifth step changing said clock to the first state from the second state by said clock supplying means; and

a sixth step connecting said first and second capacitors in parallel by turning said second switching means on,

wherein said first to sixth steps are repeated.