Output feedback and under-voltage detection system that senses an input current representing a voltage input

• US 6,438,003 B1
• Filed: 08/28/2000
• Issued: 08/20/2002
• Est. Priority Date: 11/16/1998
• Status: Expired due to Term

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Lund, Leif, Balakrishnan, Balu, Dienguerian, Alex
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US09/649,377
• Time in Patent Office: 722 Days
• Field of Search: 361/92, 363/49, 363/50, 363/55, 363/56, 323/313, 323/315, 323/276, 323/282
• US Class Current: 363/50
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence

Abstract

A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Claims

1. A method for handling an under-voltage condition at a voltage input of a power supply comprising:

sensing an input current representing the voltage input of the power supply;

generating a reference current;

detecting the under-voltage condition when the reference current exceeds the input current; and

disabling the power supply when the under-voltage condition is detected.

2. The method of claim 1 further comprising detecting the under-voltage condition during power up and/or during an off cycle in an auto-restart operation of the power supply.

3. The method of claim 1 further comprising mirroring the input current, including:

passing a mirrored input current through a first transistor having a gate and a drain, the gate being coupled to the drain; and

passing the mirrored input current through a second transistor having a gate, the gate of the second transistor coupled to the gate of the first transistor.

4. The method of claim 1 further comprising receiving the input current and a feedback signal on an electrical terminal.

5. The method of claim 3 further comprising providing a second reference current source coupled to the electrical terminal to receive a feedback signal.

6. The method of claim 5 further comprising isolating current flow from the second current source to the electrical terminal when detecting the under-voltage condition.

7. The method of claim 5 further comprising passing the feedback signal from the electrical terminal to a latch.

8. The method of claim 5 wherein a first isolation transistor is coupled between the electrical terminal and the second current source, further comprising isolating the electrical terminal and the second current source during predetermined periods.

9. The method of claim 8 wherein a second isolation transistor is coupled between the electrical terminal and the current mirror, further comprising conducting each of the first and second isolation transistors one at a time.

10. The method of claim 1 further comprising detecting if a fault condition exists and if so, disabling a power switching transistor in the power supply.

11. A power supply circuit having an input voltage comprising:

an under-voltage detector to receive an input signal representing the input voltage on an electrical terminal to detect an under-voltage condition, wherein the input signal is a current proportional to the input voltage, the power supply being disabled when the under-voltage condition is detected; and

a circuit coupled to the electrical terminal for receiving a feedback signal to regulate the power supply output.

12. The power supply circuit of claim 11 wherein the current flows through a resistor coupled between the input voltage and the electrical terminal.

13. The power supply circuit of claim 11 wherein the feedback signal is digital.

14. A method for handling an under-voltage condition at an input voltage of power supply circuit comprising:

receiving an input signal representing the input voltage on an electrical terminal, wherein the input signal is a current proportional to the input voltage, the electrical terminal carrying the input signal and a feedback signal to regulate the power supply output;

providing feedback control for the power supply based on the feedback signal carried by the electrical terminal;

detecting an under-voltage condition based on the input signal; and

disabling the power supply when the under-voltage condition is detected.

15. The method of claim 14 wherein the current flows through a resistor coupled between the input voltage and the electrical terminal.

16. The method of claim 14 wherein the feedback signal is digital.

17. A method for handling an under-voltage condition at an input voltage of a power supply circuit comprising detecting an input under-voltage condition when the power supply is disabled in auto-restart and during power-up, wherein detecting the input-under voltage condition includes sensing an input current representing the input voltage of the power supply, generating a reference current and detecting the under-voltage condition when the reference current exceeds the input current.

18. The method of claim 17 further comprising preventing the power supply from being enabled following the detection of the input under-voltage condition until the input under-voltage condition is removed.