Directional coupling memory module
First Claim
Patent Images
1. A directional coupling memory module mounted with a memory,wherein:
- a memory bus for transferring data between a memory controller and said memory is constructed by using a directional coupler, said memory controller having a function of driving a NRZ (Non-Return to Zero) signal and a function of demodulating a RTZ (Return To Zero) signal; and
a part of a terminated main line from said memory controller and a part of a terminated line drawn from said memory constitute said directional coupler that has a function of converting a NRZ signal to an RTZ signal, such that said directional coupler is formed within said memory module.
9 Assignments
0 Petitions
Accused Products
Abstract
Conventionally, wiring length occupied by a directional coupler decides intervals between modules connected to a bus, and those intervals can not be shortened furthermore. Accordingly, the intervals between modules are wide and high-density mounting is not possible. In the present invention, a directional coupler in a memory bus is formed by a leader line from a controller and a leader line from a memory chip and contained within a memory module. Accordingly, pitch between the modules can be reduced and high-density mounting can be realized.
-
Citations
11 Claims
-
1. A directional coupling memory module mounted with a memory,
wherein: - a memory bus for transferring data between a memory controller and said memory is constructed by using a directional coupler, said memory controller having a function of driving a NRZ (Non-Return to Zero) signal and a function of demodulating a RTZ (Return To Zero) signal; and
a part of a terminated main line from said memory controller and a part of a terminated line drawn from said memory constitute said directional coupler that has a function of converting a NRZ signal to an RTZ signal, such that said directional coupler is formed within said memory module. - View Dependent Claims (2, 3, 4, 5, 9)
wherein said directional coupler is a T-shaped directional coupler in which said terminated main line drawn from said memory branches in a T-shape into branch lines with both ends being terminated, and combinations of said branch lines and the main line constitute respective directional couplers. -
3. The directional coupling memory module according to claim 2, wherein:
said T-shaped directional coupler is formed to have a positive forward crosstalk coefficient, so that an NRZ signal from the memory controller or the memory is converted to an RTZ signal having sharp rises and falls by means of said T-shaped directional coupler.
-
4. The directional coupling memory module according to claim 1, wherein:
-
said memory module has two signal terminals per signal, said terminals being for a main line that is wired without a branch within said memory module; and
said main line and the line drawn from the memory constitute the directional coupler.
-
-
5. The directional coupling memory module according to claim 1, wherein:
-
said memory module comprises a transceiver having a function of demodulating a signal, which has converted from an NRZ signal to an RTZ signal by said directional coupler, into the NRZ signal again; and
said module has a function of data transfer through said directional coupler and said transceiver, between the memory controller and said memory having input and output circuits for an NRZ signal.
-
-
9. The directional coupling memory module according to claim 1,
wherein said memory has a first circuit for sending an NRZ signal as a read data signal and for receiving an RTZ signal as a write data signal, and a second circuit for receiving an NZR signal as an address or control signal.
- a memory bus for transferring data between a memory controller and said memory is constructed by using a directional coupler, said memory controller having a function of driving a NRZ (Non-Return to Zero) signal and a function of demodulating a RTZ (Return To Zero) signal; and
-
6. A directional coupling memory system in which a memory bus for transferring data between a memory controller and a memory mounted on each of a plurality of memory modules is constructed by using directional couplers, wherein:
-
said directional couplers are arranged within said memory modules;
a line for a clock signal drawn from said memory controller is folded to be connected to said memory controller again;
a line for a data signal drawn from said memory controller via a switch is folded to be connected to said switch again;
wiring is arranged such that propagation delays of said clock signal and said data signal are same;
said switch connected to said data signal is switched between a read operation and a write operation;
a line for clock signal and a line for data signal drawn from said memory and the line for clock signal and the line for data signal drawn from said memory controller constitute T-shaped couplers as said directional couplers for the clock signal and the data signal;
in a write operation;
said memory controller sends write data synchronously with the clock signal;
said switch is switched previously to data transfer, so as to make propagation directions of the clock signal and the data signal be a same direction; and
said memory uses said clock signal in order to latch write data that arrives in phase with the clock signal; and
in a read operation;
said memory sends read data synchronously with said clock signal received;
said switch is switched previously to data transfer, so as to make the propagation direction of the data signal reverse to said write operation; and
the memory controller uses said clock signal that returns to said memory controller, in order to latch said read data from said memory.- View Dependent Claims (7, 8, 10, 11)
the lines for the clock signal and the data signal drawn from said memory controller are each folded to be connected again to said memory controller;
the lines are wired such that the propagation direction of the data signal and the propagation direction of the clock signal in said memory controller have a same signal propagation time;
said memory controller sends the write data synchronously with said clock signal, and said memory uses said sent clock signal, in order to latch the write data; and
said memory sends the read data synchronously with said clock signal received, and said memory controller uses said clock signal that returns to said memory controller, in order to latch said read data from said memory.
-
-
8. The directional coupling memory system according to claim 6, wherein:
-
the line for the data signal and a line for data strobe signal draw n from said memory controller and the line for the data signal and a line for data strobe signal drawn from said memory constitute the T-shaped couplers; and
said memory controller sends the write data synchronously with said data strobe signal from said memory controller, and latches the read data from the memory by using said data strobe signal that returns to said memory controller.
-
-
10. The directional coupling memory system according to claim 6, wherein:
-
a write data signal is send from said memory controller in a same cycle with a write command signal and converted into an RTZ signal by said directional couplers; and
said converted write data signal is taken in by using a data strobe signal that is converted to an RTZ signal by said directional couplers.
-
-
11. The directional coupling memory system according to claim 6,
wherein said system comprises a module that is not mounted with a memory and has wiring such that two terminals for a signal from the memory controller are connected with a certain impedance in order not to break a terminated main line from said memory controller.
Specification