In-memory modification of computer programs

• US 6,438,621 B1
• Filed: 08/14/1998
• Issued: 08/20/2002
• Est. Priority Date: 11/14/1994
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Thomason, Jonathan G., Kanamori, Atsushi
• Primary Examiner(s): COURTENAY III, ST JOHN
• Application Number:
  US09/133,981
• Time in Patent Office: 1,467 Days
• Field of Search: 709/310-332, 709/100-108, 711/1-6, 711/100-173, 711/200-213, 713/1, 713/2, 713/100
• US Class Current: 719/331
• CPC Class Codes: G06F 9/44521 Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading

Abstract

The present invention provides a facility for performing self-patching of computer code in memory. The facility patches a segment of executable code at runtime under the control of the code segment. The code segment has a selected entry point, a patching section, and a patched section. The patching section is provided to patch the patched section in order to change the contents of the patched section. When the code segment is executed a first time at the selected entry point, execution jumps from the beginning of the patched section to a point beyond the patched section to execute the patching section. When the patching section is executed, the patching section patches the patched section. Finally, when the code segment is executed at the selected entry point after the patching section has patched the patch section, the patched section is executed rather than the patching section.

Claims

1. A method in a computer system for patching a segment of executable code at runtime under the control of the code segment, the code segment having a selected entry point, a patching section, and a patched section, the patching section for patching the patched section to change the contents of the patched section, comprising the steps of:

(a) when the code segment is executed a first time at the selected entry point, executing at least one instruction to jump from the beginning of the patched section to a point external to the patched section and executing the patching section, wherein if the code segment is not executed the first time at the selected entry point, the patching section does not patch the patched section;

(b) when the patching section is executed, patching the patched section;

(c) changing at least one instruction to prevent the patching section from being executed again; and

(d) when the code segment is executed at the selected entry point after step (b), executing the patched section.

2. The method of claim 1, further including the step of automatically executing the patched section once after patching the patched section in step (b).

3. The method of claim 2 wherein executing the at least one instruction to jump from the beginning of the patched section to the point external to the patched section causes a return address in the patched section to be maintained in memory, and wherein automatically executing the patched section further comprises modifying the return address so as to return to a different address in the patched section.

4. The method of claim 1 wherein changing at least one instruction comprises rewriting at least one instruction that that caused the jump in step (a).

5. The method of claim 1 wherein executing the at least one instruction to jump from the beginning of the patched section to the point external to the patched section causes a return memory address in the patched section to be maintained in memory, and further comprising, at the patching section, using the return memory address to determine a memory address to patch.

6. An article of computer-readable media having contents causing a computer system to patch a segment of executable code at runtime under the control of the code segment, the code segment having a selected entry point, a patching section, and a patched section, the patching section for patching the patched section to change the contents of the patched section, by performing the steps of:

(a) when the code segment is executed a first time at the selected entry point, executing at least one instruction to jump from the beginning of the patched section to a point external to the patched section and executing the patching section, wherein if the code segment is not executed the first time at the selected entry point, the patching section does not patch the patched section;

(b) when the patching section is executed, patching the patched section;

(c) changing at least one instruction to prevent the patched section from being executed again; and

(d) when the code segment is executed at the selected entry point after step (b), executing the patched section.

7. The article of computer-readable media of claim 6 wherein changing at least one instruction comprises rewriting at least one instruction that that caused the jump in step (a).

8. The article of computer-readable media of claim 6 wherein executing the at least one instruction to jump from the beginning of the patched section to the point external to the patched section causes a return memory address in the patched section to be maintained in memory, and further comprising, at the patching section, using the return memory address to determine a memory address to patch.

9. The article of computer-readable media of claim 6 further including the step of automatically executing the patched section after patching the patched section in step (b).

10. The article of computer-readable media of claim 6 wherein executing the at least one instruction to jump from the beginning of the patched section to the point external to the patched section causes a return memory address in the patched section to be maintained in memory, and further comprising, modifying the return address so as to return execution to a different address in the patched section.

11. A computer memory having executable code, comprising:

a patched section, which, when first executed, transfers control to a patching section; and

the patching section, which writes new instructions to the patched section, including at least one instruction that inhibits the transfer of control from the patched section to the patching section when the patched section is executed after the patching section writes the new instructions to the patched section.

12. The computer memory of claim 11 wherein the patching section inhibits the transfer of control by rewriting at least one instruction in the patched section that transfers control to the patching section.

13. The computer memory of claim 11 wherein a return memory address in the patched section is maintained in memory when the patched section transfers control to the patching section, and wherein the patching section includes instructions that determine a memory address to patch based on the return memory address.

14. The computer memory of claim 11 wherein the patched section is automatically executed after the patching section writes the new instructions to the patched section.

15. The computer memory of claim 11 wherein a return memory address in the patched section is maintained in memory when the patched section transfers control to the patching section, and wherein the patching section includes instructions that modify the return address so as to return execution to a different address in the patched section.

16. A computer system, comprising:

a memory containing self-patching executable code, comprising a patched section and a patching section, the patched section transferring control to the patching section when the patched section is first executed, the patching section writing new instructions to the patched section, including at least one instruction that inhibits the transfer of control from the patched section to the patching section when the patching section is executed after the patching section writes the new instructions to the patched section; and

a processor for executing the self-patching executable code.

17. The computer system of claim 16 wherein the patching section inhibits the transfer of control by rewriting at least one instruction in the patched section that transfers control to the patching section.

18. The computer system of claim 16 wherein a return memory address in the patched section is maintained in memory when the patched section transfers control to the patching section, and wherein the patching section includes instructions that determine a memory address to patch based on the return memory address.

19. The computer system of claim 16 wherein the patched section is automatically executed after the patching section writes the new instructions to the patched section.

20. The computer system of claim 16 wherein a return memory address in the patched section is maintained in memory when the patched section transfers control to the patching section, and wherein the patching section includes instructions that modify the return address so as to return execution to a different address in the patched section.

21. A method in a computer system for patching a portion of executable code when the code portion is executed, the code portion having an entry point, the method comprising the steps of:

executing the code portion at the entry point to self-patch the code portion by invoking a patching section a first time, and each time thereafter that the code portion is executed at the entry point before the patching section has executed completely, invoking the patching section another time;

each time the patching section is invoked, patching the patched code section; and

each time the code portion is executed at the entry point after the patching section has executed completely, invoking the patched code section,

such that the patched code section is only invoked after the patched code section has been completely patched by the patching section, and such that the patching code section is only invoked until the patching section has completely patched the patching section.

22. The method of claim 21 wherein the patching code section is only invoked until the patching section has completely patched the patching section by inhibiting the execution of the patched section until at least one instruction in the patching section is executed as an atomic write, the atomic write changing at least one instruction to inhibit further execution of the patching section.

23. A computer memory containing an executable code portion comprising:

a first section that is invoked each time the code portion is executed until the execution of the first section has completed for the first time, including being invoked at least one other time if the code portion is again executed and the first section has not completed, the first section patching the second section when the first section is invoked; and

a second section that is invoked each time the code portion is executed after the execution of the first section has completed for the first time, the second section being patched by the complete execution of the first section before the second section is invoked.

24. The computer memory of claim 23 wherein the first section is invoked each time the code portion is executed by executing at least one instruction in the code portion to invoke the first section until the first section executes an atomic write, the atomic write inhibiting further execution of the first section by rewriting the at least one instruction in the code portion such that the first section will no longer be invoked and the second section will be executed.