Controlled induction by use of power supply trigger in electrochemical processing

• US 6,440,291 B1
• Filed: 11/30/2000
• Issued: 08/27/2002
• Est. Priority Date: 11/30/2000
• Status: Active Grant

• Current Assignee: Novellus Systems Incorporated (LAM Research Corporation)
• Original Assignee: Novellus Systems Incorporated (LAM Research Corporation)
• Inventors: Ostrowski, John Floyd, Henri, Jon
• Primary Examiner(s): Wong, Edna
• Application Number:
  US09/727,431
• Time in Patent Office: 635 Days
• Field of Search: 205/205, 205/157, 205/81, 205/83, 205/645, 205/687
• US Class Current: 205/205
• CPC Class Codes: C25D 21/12 Process control or regulation controlling or regulating in general G05
• CPC Class Codes: C25D 5/34 Pretreatment of metallic surfaces to be electroplated

Abstract

Methods and apparatus are used for triggering and controlling an initial induction period in which a substrate is immersed in an electrochemical bath prior to actual electrochemical processing. This is accomplished by sensing a change in cell potential upon immersion of the substrate or a counter electrode in an electrochemical bath. Appropriate logic then holds the cell potential or current at a fixed value for a defined delay period. After that period ends, the logic allows the cell potential or current to increase to a level where electrochemical processing begins.

Claims

1. A method of controlling the induction period of a substrate in an electrolytic solution prior to electrochemical processing, the method comprising:

(a) applying an entry voltage to the substrate or a counter electrode prior to immersing the substrate or counter electrode in the electrolytic solution;

(b) immersing the substrate or counter electrode in the electrolytic solution while the entry voltage is applied;

(c) determining that the entry voltage has passed to a trigger voltage, which passage resulted from immersion of the substrate or counter electrode in the electrolytic solution;

(d) waiting for a defined delay period after the time of the trigger voltage; and

(e) initiating electrochemical processing of the substrate after the delay period.

2. The method of claim 1, wherein the substrate is a silicon wafer or partially fabricated integrated circuit.

3. The method of claim 2, wherein the silicon wafer or partially fabricated integrated circuit is electroplated with copper during (e).

4. The method of claim 2, wherein the silicon wafer or partially fabricated integrated circuit contains a copper seed layer over its active surface.

5. The method of claim 4, further comprising maintaining a hold current during the delay period, which hold current prevents dissolution of the copper seed layer.

6. The method of claim 5, wherein the hold current is at least about 0.05 amps.

7. The method of claim 5, wherein the hold current is between about 0.05 amps and 0.25 amps.

8. The method of claim 4, wherein the seed layer has a nominal thickness of between about 200 and 1500 angstroms.

9. The method of claim 2, wherein the entry voltage is at least about 0.2 volts between the silicon wafer or partially fabricated integrated circuit and the counter electrode.

10. The method of claim 9, wherein the entry voltage is between about 0.2 and 25 volts between the silicon wafer or partially fabricated integrated circuit and the counter electrode.

11. The method of claim 1, further comprising maintaining a hold current during the delay period, which hold current is insufficient for electroplating.

12. The method of claim 11, wherein the hold current is at least about 0.05 amps.

13. The method of claim 11, wherein the hold current is between about 0.05 amps and 0.25 amps.

14. The method of claim 1, wherein the electrolytic solution contains acid.

15. The method of claim 1, wherein the trigger voltage is at least about 0.2 volts.

16. The method of claim 1, wherein the trigger voltage is approximately one-half the value of the entry voltage.

17. The method of claim 1, wherein the delay period is between about 0.25 and 2 seconds.

18. The method of claim 17, wherein the delay period is between about 0.5 and 1.5 seconds.

19. The method of claim 18, wherein the delay period is about 1 second.