Hermetically sealed microstructure package

• US 6,441,481 B1
• Filed: 04/10/2000
• Issued: 08/27/2002
• Est. Priority Date: 04/10/2000
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Karpman, Maurice
• Primary Examiner(s): Williams, Alexander O.
• Application Number:
  US09/546,864
• Time in Patent Office: 869 Days
• Field of Search: 257/711, 257/737, 257/738, 257/778, 257/787, 257/788, 257/773, 257/777, 257/790, 257/794, 257/680, 257/774, 257/704, 257/710, 257/784, 257/678
• US Class Current: 257/711
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 1/00357 involving bonding one or several substrates on a non-temporary support, e.g. another substrate
• CPC Class Codes: B81C 2201/019 Bonding or gluing multiple substrate layers
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/16235 Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges

Abstract

A hermetically sealed wafer scale package for micro-electrical-mechanical systems devices. The package consists of a substrate wafer which contains a microstructure and a cap wafer which contains other circuitry and electrical connectors to connect to external applications. The wafers are bonded together, and the microstructure sealed, with a sealant, which in the preferred embodiment is frit glass. The wafers are electrically connected by a wire bond, which is protected by an overmold. Electrical connectors are applied to the cap wafer, which are electrically linked to the outputs and inputs of the microstructure. The final package is small, easy to manufacture and test, and more cost efficient than current hermetically sealed microstructure packages.

Claims

1. A chip-size microstructure package comprising:

a microstructure sealed within a cavity;

a cap surface defining an upper portion of the cavity;

an electrical connection from the microstructure to the cap surface; and

a protective layer which prevents damage to a portion of the electrical connection outside the cavity between a base layer and the cap surface.

2. A microstructure package according to claim 1 wherein the microstructure is sealed within the cavity formed by a material surrounding the microstructure and the cap surface adhered to the surrounding material.

3. A microstructure package according to claim 2 wherein the surrounding material is frit glass.

4. A microstructure package according to claim 1, wherein the cap surface is a preprinted wafer.

5. A microstructure package according to claim 1, wherein the electrical connection from the microstructure to the exterior of the cavity is a wire bond which connects a wafer substrate to the cap surface.

6. A microstructure package according to claim 1, wherein the protective layer is an overmold.

7. A microstructure package according to claim 1, wherein the microstructure is hermetically sealed within the cavity.

8. A microstructure package according to claim 1, wherein the cap surface is fabricated with attached circuitry.

9. A microstructure package according to claim 1, wherein a level of circuitry is located on the cap surface.