Socket test device for detecting characteristics of socket signals

• US 6,441,627 B1
• Filed: 10/26/1998
• Issued: 08/27/2002
• Est. Priority Date: 10/26/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Larson, Corey
• Primary Examiner(s): Nguyen, Vinh P.
• Application Number:
  US09/178,924
• Time in Patent Office: 1,401 Days
• Field of Search: 324/158.1, 324/73.1, 324/755, 324/537, 324/538, 324/765, 439/912, 439/66, 439/70, 439/482, 714/48, 714/733, 714/736, 714/738, 365/201
• US Class Current: 324/538
• CPC Class Codes: G11C 2029/5002 Characteristic
• CPC Class Codes: G11C 2029/5004 Voltage
• CPC Class Codes: G11C 29/022 in I/O circuitry
• CPC Class Codes: G11C 29/50 Marginal testing, e.g. race, voltage or current testing
• CPC Class Codes: G11C 29/50012 of timing

Abstract

A test device to determine the operational behavior of a memory module socket may include a connector configured to mate with a memory module socket, a signal detection circuit to detect a power characteristic of a first signal, and an edge detection circuit to detect a transition of a second signal. The test device may provide continuity verification for signals passing through the memory module socket. In another implementation, the test device may include a connector, a signal capture circuit to detect and digitally sample a signal, and a memory to store a value representative of the sampled signal. This device may use a digital signal processor (as the signal capture circuit) to analyze the sampled signal. Test devices may also include an indicator circuit to indicate operation of the signal detection, edge detection, or signal capture circuits.

Claims

1. A test device comprising:

a connector configured for insertion into a memory module socket, the connector having pins to receive signals from the socket, the signals comprising a first signal and a second signal;

a signal detection circuit, coupled to a first pin, to detect a power characteristic of the first signal to test the memory module socket;

an edge detection circuit, coupled to a second pin, to detect a transition of the second signal to test the memory module socket; and

an indicator circuit to indicate the operation of the detection circuit and the edge detection circuit.

2. The test device of claim 1, wherein the memory module socket comprises a dual in-line memory module socket.

3. The test device of claim 1, wherein the power characteristic comprises a voltage level.

4. The test device of claim 1, wherein the transition is a high-state to low-state signal transition.

5. The test device of claim 1, wherein the indicator circuit comprises a light emitting diode device.

6. The test device of claim 1, wherein the indicator circuit comprises a liquid crystal display device.

7. The test device of claim 1, wherein the connector is adapted to be inserted into the memory module socket.

8. The test device of claim 1, wherein the connector is adapted to be mated with the memory module socket, the memory module socket capable of receiving at least one memory device.

9. The test device of claim 8, wherein the connector is adapted to be mated with the memory module socket in place of the at least one memory device.

10. A test device comprising:

a unit comprising a connector for receiving signals comprising a first signal and a second signal from a memory module socket, the unit further comprising a signal capture circuit to capture signals from the connector, the unit adapted to mate with the memory module socket,

the signal capture circuit adapted to detect a power characteristic of the first signal and to detect a transition of the second signal to test the memory module socket,

the unit further comprising an indicator circuit to indicate an operation of the signal capture circuit.

11. The test device of claim 10, wherein the signal capture circuit is adapted to compare the detected power characteristic with a known range.

12. The test device of claim 10, wherein the signal capture circuit is adapted to measure a transition time of the second signal to determine signal integrity.

13. The test device of claim 10, wherein the signal capture circuit is adapted to detect the power characteristic by determining if a voltage is in a known range.

14. The test device of claim 10, wherein the connector is adapted to be inserted into the memory module socket.

15. The test device of claim 10, wherein the connector is adapted to be mated with the memory module socket, the memory module socket capable of receiving at least one memory device.

16. The test device of claim 15, wherein the connector is adapted to be mated with the memory module socket in place of the at least one memory device.

17. A method of testing, comprising:

attaching a unit having a connector to a memory module socket, the connector to receive signals comprising a first signal and a second signal from the memory module socket;

providing a signal capture circuit to capture signals from the connector;

detecting, with the signal capture circuit, a power characteristic of the first signal to test the memory module socket;

detecting, with the signal capture circuit, a transition of the second signal to test the memory module socket; and

indicating operation of the signal capture circuit with an indicator circuit.

18. The method of claim 17, wherein attaching the connector to the memory module socket is performed in place of a memory device capable of being inserted into the memory module socket.