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SOI CMOS Schmitt trigger circuits with controllable hysteresis

  • US 6,441,663 B1
  • Filed: 11/02/2000
  • Issued: 08/27/2002
  • Est. Priority Date: 11/02/2000
  • Status: Expired due to Fees
First Claim
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1. A silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) Schmitt trigger circuit with controllable hysteresis comprising:

  • a stack of a plurality of field effect transistors (FETs) connected in series between a voltage supply and ground;

    an input applied to a gate of each of said stack of said plurality of field effect transistors (FETs);

    said stack of a plurality of field effect transistors (FETs) providing an output at a junction of a predetermined pair of said plurality of field effect transistors (FETs);

    at least one feedback field effect transistor (FET), each feedback FET having a source coupled a junction of a predefined pair of said plurality of field effect transistors (FETs) and having a gate coupled to said output; and

    a FET floating body of each of said stack of said plurality of field effect transistors (FETs) being connected to a voltage supply rail.

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