Integrated circuit defect review and classification process
First Claim
1. A method for evaluating a wafer of a plurality of wafers for defects in a plurality of manufacturing processes, each wafer of the plurality of wafers having integrated circuit semiconductor dice thereon, each integrated circuit semiconductor die of said integrated circuit semiconductor dice having at least one circuit, said method comprising:
- determining from historical information concerning at least one process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least two dice of the integrated circuit semiconductor dice on the wafers, said at least one type of surface defect-visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and determining at least one subsequent failure of at least two dice having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;
visually inspecting at least two dice of integrated circuit semiconductor dice on a wafer to determine surface defects thereon by a user viewing said at least two dice of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of each of said at least two dice of said integrated circuit semiconductor dice on said wafer, said visually inspecting said at least two dice of said integrated circuit semiconductor dice on said wafer including a user using one of a scanning electron microscope and an optical microscope;
selecting types of surface defects present on said at least two dice of said integrated circuit semiconductor dice on said wafer from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user viewing said at least two dice of said integrated circuit semiconductor dice on said wafer;
selecting a range of sizes of said surface defects from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user;
selecting a number of said integrated circuit semiconductor dice for visual inspection on said wafer by the user selecting at least one other die of said integrated circuit semiconductor dice on said wafer for the visual inspection thereof for surface defects thereon;
summarizing the number, types, and range of sizes of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer from a visual inspection of at least three dice of said integrated circuit semiconductor dice on said wafer by the user;
comparing said number, types and ranges of sizes of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the at least one process of manufacture of integrated circuit semiconductor dice on wafers; and
determining if said wafer is acceptable to proceed in said manufacturing process based upon the visual inspection of the at least three dice of said integrated circuit semiconductor dice on said wafer by the user and based upon the historical information concerning the at least one process of manufacture of integrated circuit semiconductor dice on wafers and the at least one relationship between the at least one type of surface defect on the at least two dice of the integrated circuit semiconductor dice on the wafers visible to the user visually inspecting the integrated circuit semiconductor dice on the wafers and the at least one subsequent failure of the at least two dice having the surface defect thereon of the integrated circuit semiconductor dice on the wafers.
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Accused Products
Abstract
The present invention relates to circuit defect detection, classification, and review in the wafer stage of the integrated circuit semiconductor device manufacturing process. The method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for dice comprises the steps of visually inspecting the dice on the wafer to determine defects thereon, summarizing the number, types, and ranges of sizes of the defects of the dice on the wafer, and determining if the wafer is acceptable to proceed in the manufacturing process.
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Citations
21 Claims
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1. A method for evaluating a wafer of a plurality of wafers for defects in a plurality of manufacturing processes, each wafer of the plurality of wafers having integrated circuit semiconductor dice thereon, each integrated circuit semiconductor die of said integrated circuit semiconductor dice having at least one circuit, said method comprising:
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determining from historical information concerning at least one process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least two dice of the integrated circuit semiconductor dice on the wafers, said at least one type of surface defect-visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and determining at least one subsequent failure of at least two dice having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;
visually inspecting at least two dice of integrated circuit semiconductor dice on a wafer to determine surface defects thereon by a user viewing said at least two dice of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of each of said at least two dice of said integrated circuit semiconductor dice on said wafer, said visually inspecting said at least two dice of said integrated circuit semiconductor dice on said wafer including a user using one of a scanning electron microscope and an optical microscope;
selecting types of surface defects present on said at least two dice of said integrated circuit semiconductor dice on said wafer from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user viewing said at least two dice of said integrated circuit semiconductor dice on said wafer;
selecting a range of sizes of said surface defects from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user;
selecting a number of said integrated circuit semiconductor dice for visual inspection on said wafer by the user selecting at least one other die of said integrated circuit semiconductor dice on said wafer for the visual inspection thereof for surface defects thereon;
summarizing the number, types, and range of sizes of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer from a visual inspection of at least three dice of said integrated circuit semiconductor dice on said wafer by the user;
comparing said number, types and ranges of sizes of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the at least one process of manufacture of integrated circuit semiconductor dice on wafers; and
determining if said wafer is acceptable to proceed in said manufacturing process based upon the visual inspection of the at least three dice of said integrated circuit semiconductor dice on said wafer by the user and based upon the historical information concerning the at least one process of manufacture of integrated circuit semiconductor dice on wafers and the at least one relationship between the at least one type of surface defect on the at least two dice of the integrated circuit semiconductor dice on the wafers visible to the user visually inspecting the integrated circuit semiconductor dice on the wafers and the at least one subsequent failure of the at least two dice having the surface defect thereon of the integrated circuit semiconductor dice on the wafers.
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2. A method for processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice, each integrated circuit semiconductor die of said integrated circuit semiconductor dice having at least one circuit, said method comprising:
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determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least two dice of the integrated circuit semiconductor dice on the wafers, the at least one type of surface defect visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and determining at least one subsequent failure of at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;
visually inspecting said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by the user visually inspecting at least two dice of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of each of at least two dice of said integrated circuit semiconductor dice on said wafer, said visually inspecting said at least two dice of said integrated circuit semiconductor dice on said wafer including a user using one of a scanning electron microscope and an optical microscope;
classifying visual surface defects on said integrated circuit semiconductor dice of said wafer as to type and range of size of surface defect by the user from a manual visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user;
determining a number of said surface defects on said integrated circuit semiconductor dice on said wafer;
selecting a range of sizes of said surface defects from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user;
selecting a number of said integrated circuit dice for visual inspection on said wafer by the user selecting at least one other die of said integrated circuit semiconductor dice on said wafer for the visual inspection thereof for surface defects thereon;
summarizing the number, types, and range of sizes of the surface defects on said integrated circuit semiconductor dice on said wafer by the user from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by the user;
comparing said number, types and ranges of sizes of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers;
determining if said wafer is acceptable to proceed in said manufacturing process from a visual inspection of at least three dice of said integrated circuit semiconductor dice on said wafer by the user and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers and the at least one relationship between the at least one type of surface defect on the at least two dice of the integrated circuit semiconductor dice on the wafers visible to the user visually inspecting the integrated circuit semiconductor dice on the wafers and the at least one subsequent failure of the at least one die having the surface defect thereon of the integrated circuit semiconductor dice on the wafers; and
photographing the surface defects on said integrated circuit semiconductor dice of said wafer from the visual inspection of the at least two dice of said integrated circuit semiconductor dice on said wafer by the user. - View Dependent Claims (3, 4, 5, 6, 7, 8)
classifying visual surface defects of said at least two dice of said integrated circuit semiconductor dice of said wafer as to size of the visual surface defect.
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4. The method of claim 3, further including:
classifying said visual surface defects of said at least two dice of said integrated circuit semiconductor dice of said wafer as to a size range of the visual surface defect.
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5. The method of claim 4, further including:
summarizing the number, types, and range of sizes of the visual surface defects of said at least two dice of said integrated circuit semiconductor dice on said wafer in a tabular manner.
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6. The method of claim 5, further including:
summarizing the number, types, and range of sizes of the visual surface defects of said at least two dice of said integrated circuit semiconductor dice on said wafer in a display of said integrated circuit semiconductor dice of said wafer.
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7. The method of claim 2, further including:
determining if said wafer is acceptable to proceed in said manufacturing process as a wafer being processed with other wafers having dice thereon as a group of wafers in said manufacturing process.
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8. The method of claim 2, further including:
determining if an individual die of said at least two dice of said integrated circuit semiconductor dice of said wafer is acceptable to proceed in said manufacturing process.
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9. A method for processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice, each integrated circuit semiconductor die of said integrated circuit semiconductor dice having at least one circuit, said method comprising:
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determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least two dice of the integrated circuit semiconductor dice on the wafers, the at least one type of surface defect visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and determining at least one subsequent failure of at least two dice having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;
selecting types of surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by the user visually inspecting at least two dice of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of each of said integrated circuit semiconductor dice;
selecting a range of sizes of said surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by the user from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer;
selecting a number of said integrated circuit semiconductor dice for visual inspection on said wafer by the user from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer;
visually inspecting at least one other integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by the user, said visually inspecting said at least two dice of said integrated circuit semiconductor dice on said wafer including a user using one of a scanning electron microscope and an optical microscope;
summarizing the number, types, and range of sizes of the surface defects of said integrated circuit semiconductor dice on said wafer by the user from a visual inspection of at least three dice of said integrated circuit semiconductor dice on said wafer;
comparing said number, types and range of sizes of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers; and
determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of said at least three dice of said integrated circuit semiconductor dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers and the at least one relationship between the at least one type of surface defect on the at least two dice of said integrated circuit semiconductor dice on the wafers visible to the user visually inspecting the integrated circuit semiconductor dice on the wafers and the at least one subsequent failure of the at least two dice having the surface defect thereon of the integrated circuit semiconductor dice on the wafers.
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10. The processing of wafers having at least one integrated circuit semiconductor die thereon in a manufacturing process for said wafers, said at least one integrated circuit semiconductor die having at least one circuit, said processing comprising:
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determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least two dice of the integrated circuit semiconductor dice on the wafers, the at least one type of surface defect visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and determining at least one subsequent failure of at least two dice having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;
selecting types of surface defects to be determined from a visual inspection of said integrated circuit semiconductor dice on said wafer by said user visually inspecting at least two dice of said integrated circuit semiconductor dice on said wafer, said types of surface defects including at least one-surface defect of surface defects from bond pad formation problems and surface defects from incomplete formation of said at least one circuit of said each integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer;
selecting a range of sizes of said surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by said user from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer;
selecting a number of said integrated circuit semiconductor dice for visual inspection on said wafer by said user from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer;
visually inspecting said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by said user visually inspecting said at least two dice of said integrated circuit semiconductor dice on said wafer, wherein visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer using an apparatus for viewing said integrated circuit semiconductor dice;
summarizing the number, types, and range of sizes of the surface defects of said integrated circuit semiconductor dice on said wafer by said user from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer;
comparing said number, types and range of sizes of the surface defects of said at least two dice and at least one other die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers; and
determining if said wafer is acceptable to proceed in said manufacturing process based upon said visual inspection by said user of said at least two dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers and the at least one relationship between the at least one type of surface defect on the at least two dice of-the integrated circuit semiconductor dice on the wafers visible to the user visually inspecting the integrated circuit semiconductor dice on the wafers and the at least one subsequent failure of the at least two dice having the surface defect thereon of the integrated circuit semiconductor dice on the wafers.
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11. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice by a user, each integrated circuit semiconductor die of said integrated circuit semiconductor dice having at least one circuit, said method comprising:
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determining from information concerning a process of manufacture of integrated circuit semiconductor dice on wafers relationships between at least two types of surface defects on at least two dice of the integrated circuit semiconductor dice on the wafers, the at least two types of surface defects visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for the at least two types of surface defects thereon and determining at least one subsequent failure of at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;
selecting types of surface defects to be determined from a visual inspection of said integrated circuit semiconductor dice on said wafer by said user visually inspecting at least two dice of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one surface defect of surface defects from bond pad formation problems and surface defects from incomplete formation of said at least one circuit of said each integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer, said visually inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer including a user using one of a scanning electron microscope and an optical microscope;
selecting a size of said surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by said user visually inspecting said at least two dice of said integrated circuit semiconductor dice on said wafer;
selecting a number of said integrated circuit semiconductor dice for visual inspection on said wafer by said user based on the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer;
visually inspecting at least one other die of said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by said user;
summarizing the number, types, and size of the surface defects of said integrated circuit semiconductor dice on said wafer by said user from the visual inspection of at least three dice of said integrated circuit semiconductor dice on said wafer;
comparing said number, types and size of the surface defects of said at least two dice and said at least one other die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers;
determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of said at least three dice of said integrated circuit semiconductor dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers and the relationships between the at least two types of surface defects on said at least two dice of the integrated circuit semiconductor dice on the wafers visible to said user visually inspecting the integrated circuit semiconductor dice on the wafers and said at least one subsequent failure of the at least one die having the surface defect thereon of the integrated circuit semiconductor dice on the wafers; and
photographing the surface defects on said integrated circuit semiconductor dice of said wafer from the visual inspection by said user of said at least two dice of said integrated circuit semiconductor dice on said wafer. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
classifying visual surface defects of said integrated circuit semiconductor dice of said wafer as to type of surface defect.
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13. The method of claim 12, further including:
classifying said visual surface defects of said integrated circuit semiconductor dice of said wafer as to size of the surface defect.
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14. The method of claim 13, further including:
classifying said visual surface defects of said integrated circuit semiconductor dice of said wafer as to a size range of the surface defect.
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15. The method of claim 14, further including:
summarizing the number, types, and range of sizes of the surface defects of said integrated circuit semiconductor dice on said wafer in a tabular manner.
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16. The method of claim 15, further including:
summarizing the number, types, and range of sizes of the surface defects of said integrated circuit semiconductor dice on said wafer in a display of said integrated circuit semiconductor dice of said wafer.
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17. The method of claim 11, further including:
determining if said wafer is acceptable to proceed in said manufacturing process as a wafer being processed with other wafers having integrated circuit semiconductor dice thereon as a group of wafers in said manufacturing process.
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18. The method of claim 11, further including:
determining if an individual die of said integrated circuit semiconductor dice of said wafer is acceptable to proceed in said manufacturing process.
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19. The processing of integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice by a user, each integrated circuit semiconductor die of said integrated circuit semiconductor dice having at least one circuit, said processing comprising:
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determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least two integrated circuit semiconductor dice of the integrated circuit semiconductor dice on the wafers, the at least one type of surface defect visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and determining at least one subsequent failure of at least one integrated circuit semiconductor die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers, the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer by a user including a user operating one of a scanning electron microscope and an optical microscope;
visually inspecting at least two dice of said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by said user, said surface defects including at least one surface defect of surface defects from bond pad formation problems and surface defects from incomplete formation of said at least one circuit of said each integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer, the surface defects having a type and size;
summarizing the surface defects on said dice on said wafer by said user from the said visual inspection of said at least two dice of said dice on said wafer;
comparing number, types and ranges of sizes of the surface defects of at least one integrated circuit semiconductor die and at least one other integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers; and
determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of said at least two dice of said integrated circuit semiconductor dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers and the at least one relationship between said at least one type of surface defect on said at least two dice of the integrated circuit semiconductor dice on the wafers visible to said user visually inspecting the integrated circuit semiconductor dice on the wafers and said at least one subsequent failure of the at least two dice having the surface defect thereon of the integrated circuit semiconductor dice on the wafers. - View Dependent Claims (20, 21)
selecting types of said surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by said user from the visual inspection of at least three integrated circuit semiconductor dice of said integrated circuit semiconductor dice on said wafer;
selecting sizes of said surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by said user from the visual inspection of said at least three integrated circuit semiconductor dice of said integrated circuit semiconductor dice on said wafer; and
selecting at least three of said integrated circuit semiconductor dice for visual inspection on said wafer by a user from the visual inspection of at least three die of said integrated circuit semiconductor dice on said wafer.
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21. The method of claim 19, wherein the visually inspecting said integrated circuit semiconductor dice on said wafer includes using a scanning electron microscope or optical microscope by said user.
Specification