Multiple low speed sigma-delta analog front ends for full implementation of high-speed data link protocol

• US 6,442,195 B1
• Filed: 08/27/1997
• Issued: 08/27/2002
• Est. Priority Date: 06/30/1997
• Status: Expired due to Term

• Current Assignee: Realtek Semiconductor Corp.
• Original Assignee: Integrated Telecom Express, Inc.
• Inventors: Wang, Yukuang, Liu, Ming-Kang, Ku, Man Ho
• Primary Examiner(s): Pham, Chi
• Assistant Examiner(s): Bayard, Emmanuel
• Application Number:
  US08/925,003
• Time in Patent Office: 1,826 Days
• Field of Search: 375/219, 375/222, 375/220, 375/259, 375/257, 375/316, 375/340, 455/73, 455/557, 455/500, 455/509, 455/422, 455/426, 455/555, 455/560, 455/561, 455/90, 370/278, 370/282, 370/329, 370/330, 370/336, 370/337, 370/345, 370/442
• US Class Current: 375/220
• CPC Class Codes: H04B 1/38 Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
• CPC Class Codes: H04L 5/06 the signals being represented by different frequencies combined with time-division multiplexing H04L5/26
• CPC Class Codes: H04L 5/143 for modulated signals H04L5/1469 takes precedence
• CPC Class Codes: H04L 5/16 Half-duplex systems; Simplex/duplex switching; Transmission of break signals non-automatically inverting the direction of transmission
• CPC Class Codes: H04M 11/062 using different frequency bands for speech and other data

Abstract

An analog front end (AFE) circuit used in a high-speed communications system is presented that includes multiple stages each including a bandpass filter, base band modulator, low pass filter and Sigma-Delta modulator. Each stage processes a fractional portion of the total frequency of a wide bandwidth analog signal. The number of such AFE stages is configurable in parallel to process the entire bandwidth of the received signal. The AFEs can be incorporated in a single integrated circuit or similar suitable manner so as to be modular, and easily replaceable/upgradeable. To achieve minimum quantization noise and reduce manufacturing costs, the Sigma-Delta modulators in each AFE are made to have identical characteristics. Because the wideband signal is broken down into smaller frequency portions, the sampling rate, and thus the complexity and cost associated with the AFEs, is reduced significantly. In a preferred embodiment, a number of such AFEs are used in an ADSL modem for processing separate but roughly equal portions of the wideband ADSL signal containing data carrying DMT sub-channels. The separated portions are re-combined in a DMT receiver logic circuit to reconstruct the original data stream.

Claims

1. A high speed communications transceiver for communicating through a channel with an upstream transceiver transmitting an analog data signal using M data carrying signals within a bandwidth F to the transceiver, said transceiver comprising:

a channel interface circuit for coupling to and receiving said analog data signal from the channel; and

a front end receiving circuit for performing filtering and analog to digital conversion on the entire analog data signal by;

(i) dividing such signal into a plurality of sub-bands, each sub-band including data from a frequency band which is a fractional portion of said bandwidth F and which contains a number of data carrying signals B, where B>

1; and

(ii) by sampling the sub-bands and generating a plurality of digital signals corresponding to data carrying signals within such sub-band; and

a signal processing circuit for extracting data from the plurality of digital signals within the plurality of sub-bands.

2. The transceiver of claim 1, wherein the front end receiving circuit includes N sub-band filters for dividing the analog data signal into N filtered analog data signals occupying N different frequency bands.

3. The transceiver of claim 2, wherein the N frequency bands are all approximately equal to a frequency bandwidth size f, where f<

F.

4. The transceiver of claim 3, where a number of sub-band filters N is selected so that F=N*f.

5. The transceiver of claim 4, wherein the N sub-band filters are arranged in parallel and each operates simultaneously on different frequency portion k*f of said analog signal, where k={1, 2, 3, . . . N−

1}.

6. The transceiver of claim 2, wherein the front end receiving circuit shifts the N filtered analog data signals to generate N baseband analog data signals.

7. The transceiver of claim 6, wherein the front end receiving circuit includes N analog to digital converters for sampling and converting the N baseband analog data signals to generate N digital signals.

8. The transceiver of claim 7, wherein the N analog to digital converters are comprised of N substantially identical Sigma Delta modulators and N filters associated with such Sigma Delta modulators.

9. The transceiver of claim 8, wherein N=2, 4 or 8.

10. The transceiver of claim 9, wherein quantization noise in the N digital signals is less than that in the N filtered analog data signals.

11. The transceiver of claim 1, wherein the front end receiving circuit is implemented in a number of modular analog front end stages for performing the filtering and analog to digital conversion, such that any one or all of such stages can be easily replaced.

12. The transceiver of claim 1, wherein data sampling requirements of the front end are reduced because data sampling is only performed on fractional portions of analog data signal.

13. The transceiver of claim 1, wherein dividing the analog data signal results in reduced clipping noise.

14. The transceiver of claim 2, wherein the front end receiving circuit is programmable, such that such front end receiving circuit can be programmed to perform filtering and analog to digital conversion on a second analog data signal having a frequency greater than said analog data signal.

15. The transceiver of claim 1, wherein the signal processing circuit includes a host processor circuit in a host processing device for extracting the data from the data carrying signals.

16. The transceiver of claim 1, wherein the signal processing circuit includes a digital signal processor for extracting the data from the data carrying signals.

17. The transceiver of claim 16 further including a control circuit coupled to the signal processing circuit for distributing the extracted data to one or more host processing systems.

18. The transceiver of claim 1, wherein the upstream transceiver uses discrete multi-tone (DMT) modulation for generating the analog data signal and the channel supports asymmetric digital subscriber loop (ADSL) transmission standards.

19. A high speed communications system for receiving an analog data signal through a channel, said analog data signal containing data signals in L modulated sub-channels from an upstream transceiver, said system comprising:

a channel interface circuit for coupling to and receiving said analog data signal from the channel; and

a frontend receiving circuit for performing filtering and analog to digital conversion on the entire analog data signal by;

(i) grouping such signal into a plurality of subchannel sets, each set including data from a number of subchannels; and

(ii) by sampling each of the sets and generating a plurality of digital signals corresponding to data signals within such subchannel set; and

a signal processing circuit for extracting data from the plurality of digital signals within the plural of subchannel sets.

20. The system of claim 19, wherein the front end receiving circuit includes N subchannel filters for dividing the analog data signal into N filtered analog data signals corresponding to N different subchannel sets.

21. The system of claim 20, wherein the N subchannel sets all include an approximately equal number of subchannels B, where B<

L.

22. The system of claim 21, where a number of subchannel filters N is selected so that L=B*N.

23. The system of claim 22, wherein the N subchannel filters are arranged in parallel and each operates simultaneously on different subchannel set k of said analog signal, where k={0, 1, 2, 3, . . . N−

1}.

24. The system of claim 20, wherein the front end receiving circuit modulates the N filtered analog data signals to generate N frequency shifted analog data signals.

25. The system of claim 24, wherein the front end receiving circuit includes N analog to digital converters for sampling and converting the N frequency shifted analog data signals to generate N digital signals.

26. The system of claim 25, wherein the N analog to digital converters are comprised of N substantially identical Sigma Delta modulators and N filters associated with such Sigma Delta modulators.

27. The system of claim 26, wherein N=2, 4 or 8.

28. The system of claim 27, wherein the quantization noise in the N digital signals is less than that in the N filtered analog data signals.

29. The system of claim 19, wherein data sampling requirements of the front end receiving circuit are reduced because data sampling is only performed on smaller subsets of the L modulated subchannels.

30. The system of claim 19, wherein dividing the analog data signal into subchannel sets results in reduced clipping noise.

31. The system of claim 19, wherein the front end receiving circuit is implemented in a number of modular analog front end stages for performing the filtering and analog to digital conversion, such that any one or all of such stages can be easily replaced in said system.

32. The system of claim 20, wherein the front end receiving circuit is programmable, such that such receiving circuit can be programmed to perform filtering and analog to digital conversion on a second analog data signal having a frequency greater than said analog data signal.

33. The system of claim 19, wherein the signal processing circuit includes a host processor circuit in a host processing device for extracting the data from the data carrying signals.

34. The system of claim 19 wherein the signal processing circuit includes a digital signal processor for extracting the data from the data carrying signals.

35. The system of claim 34, further including a control circuit coupled to the signal processing circuit for distributing the extracted data to one or more host processing systems.

36. The system of claim 35, wherein the upstream transceiver uses discrete multi-tone (DMT) modulation for generating the M modulated sub-channels, and the channel supports asymmetric digital subscriber loop (ADSL) transmission standards.

37. A data distribution circuit for controlling a high speed transceiver, said transceiver including M data ports (M>

=2), and each of said data ports includes an analog front end circuit for filtering and sampling a separate portion of an analog signal having a frequency bandwidth F received by said transceiver through a channel, said data distribution circuit comprising;

a transceiver interface coupled to said transceiver, and

a bus interface coupled to a plurality of processing devices; and

a control circuit for configuring said M data ports based on configuration information received from the processing devices;

wherein received data in said analog signal can be allocated and shared between such processing devices; and

further wherein sampling rate requirements associated with handling the analog signal are reduced by dividing such analog signal into M separate portions that are operated on independently by the M data ports.

38. The circuit of claim 37 wherein said control circuit generates control signals:

(i) for controlling the filtering performed by said M data ports, such that M filtered analog signals can be generated by dividing the frequency bandwidth of said analog signal into M sub-bands; and

(ii) for controlling the sampling performed by said M data ports on the M filtered analog signals, such that digital signals corresponding to data signals within each of the M filtered analog signals are generated by said front end circuits.

39. The circuit of claim 38, wherein the M sub-bands are all approximately equal to a frequency bandwidth size f, and where F=M*f.

40. The circuit of claim 39, wherein the control circuit configures the M data ports such that sampling is performed on M frequency shifted analog data signals that are generated by modulating the M filtered analog data signals.

41. The circuit of claim 38, wherein the control circuit generates control signals transmitted through the transceiver interface for controlling a signal processing circuit which extracts the received data from said analog signal.

42. The circuit of claim 38, wherein the analog signal includes data from a set of N modulated subchannels and the processing devices each receive data from a different subset of the N sub-channels.

43. The circuit of claim 38 wherein said control circuit can configure said transceiver such that any one of said processing devices can utilize all of said data ports at the same time.

44. A method of operating a high speed communications system that is coupled to an upstream transceiver through a channel capable of supporting an analog signal including M modulated sub-channels, said method comprising the steps of:

(a) receiving said analog signal from the upstream transceiver through the channel;

(b) dividing such signal into a plurality of sub-bands, each sub-band including data from a number (B) of sub-channels from the M sub-channels, where B>

1; and

(c) sampling the sub-bands and generating a plurality of digital signals corresponding to data signals within such sub-band; and

(d) extracting data from the plurality of digital signals within the plurality of sub-bands.

45. The method of claim 44 wherein during step (b) N sub-band filters are used for dividing the analog data signal into N filtered analog data signals occupying N different frequency bands.

46. The method of claim 45, wherein the N frequency bands are all approximately equal to a frequency bandwidth size f, where f<

F, and each frequency band contains approximately the same number of sub-channels, p, where p<

M.

47. The method of claim 46, where a number of sub-band filters N is selected so that F=N*f, and M=N*p.

48. The method of claim 47, wherein the N sub-band filters are arranged in parallel and each operates simultaneously on different frequency portion k*f of said analog signal, where k={0, 1, 2, 3, . . . N−

1}.

49. The method of claim 45, further including a step (b)(2) after step (b):

modulating the N filtered analog data signals to generate N frequency shifted analog data signals.

50. The method of claim 44, wherein during step (c) N analog to digital converters sample and convert the N frequency shifted analog data signals to generate N digital signals.

51. The method of claim 50, wherein the N analog to digital converters are comprised of N substantially identical Sigma Delta modulators and N filters associated with such Sigma Delta modulators.

52. The method of claim 50, wherein N=2, 4 or 8.

53. The method of claim 52, wherein the quantization noise in the N digital signals is less than that in the N filtered analog data signals.

54. The method of claim 44, wherein a first modular front end circuit is used for performing steps (b) and (c), and further including a step (e):

substituting a second front end circuit for the first front end circuit, the second front end circuit being capable of performing filtering and analog to digital conversion on a second analog data signal having a frequency greater than said analog data signal.

55. The method of claim 44, wherein sampling requirements are reduced because data sampling is only performed on fractional portions of said analog data signal.

56. The method of claim 44, wherein dividing said analog data signal results in reduced clipping noise.

57. The method of claim 54, wherein the front end receiving circuit is programmable, and further including a step (f):

programming the front end receiving circuit to perform filtering and analog to digital conversion on a second analog data signal having a frequency greater than said analog data signal.

58. The method of claim 44, wherein the signal processing circuit includes a host processor circuit in a host processing device for extracting the data from the data carrying signals.

59. The method of claim 44 wherein the signal processing circuit includes a digital signal processor for extracting the data from the data carrying signals.

60. The method of claim 59, further including a control circuit coupled to the signal processing circuit for distributing the extracted data to one or more host processing systems.

61. The method of claim 44, wherein the upstream transceiver uses discrete multi-tone (DMT) modulation for generating the M modulated sub-channels, and the channel supports asymmetric digital subscriber loop (ADSL) transmission standards.

62. An analog front end (AFE) circuit used in a data communications system that uses an xDSL-based analog signal including M discrete multitone (DMT) modulated sub-channels for:

carrying a data transmission, the AFE circuit including;

a channel interface circuit for receiving the xDSL based analog signal from a remote transceiver through a digital subscriber loop (DSL); and

a set of N sub-band filters for dividing and filtering the xDSL based analog signal to generate a set of N separate sub-band analog signals, such that each of said N separate sub-band signals includes a bandwidth sufficient to carry at least B DMT sub-channels, where B>

1, and such set of N sub-band filters being configured so that all of the M DMT sub-channels can be included within said N separate sub-band signals; and

a set of N analog to digital converters for converting said N separate sub-band analog signals into N separate sub-band digital signals, each of said N analog to digital converters receiving a corresponding one of said N separate sub-band analog signals; and

wherein analog to digital data sampling requirements are reduced for handling the data transmission carried by the M DMT sub-channels as a result of the xDSL based analog signal being divided into at least N separate portions before being processed by said set of N analog to digital converters.

63. The AFE circuit of claim 62, wherein said set of N analog to digital converters are implemented as N substantially identical and separate sigma delta modulators that produce less noise output handling said N separate filtered analog signals than would a single Nyquist based analog to digital converter handling all of the xDSL based analog signal.

64. The AFE circuit of claim 62, wherein during a first time period, the xDSL based analog signal is divided so that a first number of the M sub-channels are processed, and during a second time period, the xDSL based analog signal is divided so that a remaining number of the M sub-channels are processed.

65. The method of claim 62 wherein the data transmission is performed in accordance with T1.413 based protocols.

66. A method of operating an analog front end circuit used in a data communications system that uses an xDSL-based analog signal including M discrete multitone (DNM modulated sub-channels for carrying a data transmission, said method comprising the steps of:

(a) receiving the xDSL based analog signal from a remote transceiver through a digital subscriber loop PSL); and

(b) filtering the xDSL based analog signal such that a selectable number of the M sub-channels can be used for the data transmission; and

(c) dividing the xDSL based analog signal into N sub-band signals, each of said N sub-band signals occupying a frequency bandwidth corresponding in size to include at least a set of sub-channels B, where B>

1, and such that N resulting separate sets of B or more sub-channels are used to constitute said selectable number of the M sub-channels; and

(d) separately sampling the N sub-band signals and generating a set of N separate digital signals that correspond to data signals embodied in each of said N separate sets of B or more sub-channels; and

wherein analog to digital data sampling requirements are reduced for handling the data transmission received as data signals carried by the selectable number of the M sub-channels as a result of the xDSL based analog signal being initially divided into at least N separate portions, and where said N separate portions are processed separately.

67. The method of claim 66 wherein step (d) is performed by N substantially identical and separate sigma delta modulators that produce less noise output than would a Nyquist based analog to digital converter processing all of the xDSL based analog signal.

68. The method of claim 66 wherein during a first time period, said xDSL based analog signal is divided so that a first portion of said M sub-channels are processed, and during a second time period, said xDSL based analog signal is divided so that a remaining portion of said M sub-channels are processed.

69. The method of claim 66 wherein said data transmission is performed in accordance with T1.413 based protocols.

70. A shared xDSL compatible data communications system comprising:

a channel interface circuit adapted for receiving an xDSL based analog signal from a remote transceiver through a digital subscriber loop (DSL), said xDSL based analog signal being used to carry up to M discrete multi-tone (DMT) modulated sub-channels; and

a plurality of front end filters (N) for determining a bandwidth of said xDSL based analog signal, and for dividing said xDSL based analog signal into N separate filtered analog signals based on total available bandwidth in said DSL as well as requirements of one or more users of the xDSL compatible data communications system, said N separate filtered analog signals having a bandwidth corresponding to at least B DMT sub-channels, where B>

1; and

a plurality of analog to digital converters (N) each coupled to a separate one of said plurality of front end filters and generating a digital output signal based on one of said N separate filtered analog signals, such that N separate digital output signals are generated; and

a control circuit for distributing said N separate digital output signals to one or more signal processing circuits associated with said one or more users for demodulation of said B DMT sub-channels;

wherein said DSL can be shared by said one or more users during said data transmission.

71. The system of claim 70, wherein said plurality of analog to digital converters are implemented as N substantially identical and separate sigma delta modulators that produce less noise output handling said N separate filtered analog signals than would a single Nyquist based analog to digital converter handling all of said xDSL based analog signal.

72. The system of claim 70, wherein during a first time period, said xDSL based analog signal is divided so that a first portion of said M sub-channels are processed, and during a second time period, said xDSL based analog signal is divided so that a remaining portion of said M sub-channels are processed.

73. The system of claim 70 wherein said data transmission is performed in accordance with T1.413 based protocols.

74. A method of operating a shared xDSL compatible data communications system comprising the steps of:

(a) receiving an xDSL based analog signal from a remote transceiver through a digital subscriber loop (DSL);

(b) selecting, a number (M) of discrete multi-tone (DMT) sub-channels to be included in the xDSL based analog signal for a data transmission, where M is based on total available bandwidth in said DSL as well as requirements of one or more users of the xDSL compatible data communications system;

(c) sharing said M DMT subchannels for data transmission between said one or more users by dividing said M DMT sub-channels into N separate data sub-bands having B or more sub-channels, where B>

1, said N separate data sub-bands being configured in number and size in accordance with transmission requirements of said one or more users;

(d) separately performing A/D operations on N separate sub-band signals associated with said N separate data sub-bands to extract N separate digital signals;

(e) demodulating said N separate digital signals to extract data for said one or more users;

wherein said DSL can be shared by said one or more users during said data transmission.

75. A method of operating a shared xDSL compatible data communications system comprising the steps of:

(a) receiving an xDSL based analog signal from a remote transceiver through a digital subscriber loop (DSL);

(b) selecting a frequency bandwidth F for said xDSL based analog signal to be used for the data transmission, where F is based on total available bandwidth in said DSL as well as requirements of one or more users of the xDSL compatible data communications system;

(c) sharing said frequency bandwidth F for data transmission between said one or more users by dividing said frequency bandwidth F into N separate data sub-bands, said N separate data sub-bands being configured in number and size in accordance with transmission requirements of said one or more users;

(d) performing separate A/D operations on N separate sub-band signals associated with said N separate data sub-bands to extract N separate digital signals;

(e) demodulating said N separate digital signals to extract data for said one or more users;

wherein said frequency bandwidth F bandwidth of said DSL can be shared by said one or more users.