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Multi-phase-locked loop for data recovery

  • US 6,442,225 B1
  • Filed: 06/14/1999
  • Issued: 08/27/2002
  • Est. Priority Date: 06/14/1999
  • Status: Expired
First Claim
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1. A multi-phase-locked loop for data recovery comprising a phase detector, a charge pump, a loop filter and a voltage controlled oscillator, wherein:

  • said phase detector is constituted by N phase detection units (U1, U2, . . . , UN, N is even, N≧

    4);

    said N phase detection units are connected in cascade configuration, and each phase detection unit contains a data signal input terminal for receiving a data signal from outside;

    a clock signal input terminal for receiving the multi-phase clock signals (CK1, CK2, . . . , CKN) from outside;

    a delay signal input terminal for receiving a delay signal output from another phase detection unit;

    a delay signal output terminal for outputting a delay signal; and

    a charge/discharge control signal output terminal for outputting control signals for charge/discharge operations;

    each of said N phase detection units generates a delay signal (D1, D2, . . . , DN) according to an input data signal and the complement of a multi-phase clock signal;

    the delay signal (Dj+1) generated by the (j+1)th phase detection unit is input into the jth phase detection unit via the jth delay signal input terminal;

    the delay signal (D1) generated by the first phase detection unit is input into the Nth phase detection unit via the Nth delay signal input terminal;

    the jth phase detection unit (Uj

    1≦

    j<

    N, j is a positive integer) generates control signals (dn1, dn2, . . . , dnN/2, upN/2, . . . , up2) for charge/discharge operations according to the delay signal (Dj) from the jth phase detection unit, the delay signal (Dj+1) from the (j+1)th phase detection unit, and the multi-phase clock signal (CKj) which is applied to the jth phase detection unit;

    the Nth phase detection unit generates a charge control signal (up1) according to the delay signal (Dn) from the Nth phase detection unit, the delay signal (D1) from the first phase detection unit, and the multi-phase clock signal (CKN) which is applied to the Nth phase detection unit;

    said charge pump being constituted by N/2 charge and discharge units (CP1, CP2, . . . , CPN/2), wherein the kth (CPk, 1≦

    k≦

    N/2) charge and discharge unit (CPk) is employed to receive the kth charge/discharge control signal set (upk/dnk) from said phase detector, and a current Ichk is generated by the charge/discharge control signal set (upk/dnk);

    the charge/discharge current Ichk=(wk×

    upk

    wk×

    dnk)Iss, wherein wk is a weighting value, Iss is a fixed current value, and w1<

    w2<

    . . . <

    wN/2;

    the total charge/discharge current (Ich) from said charge pump equals to Ich1+Ich2+ . . . Ichk+ . . . +IchN/2; and

    said voltage controlled oscillator is a multi-phase voltage controlled oscillator, which outputs N multi-phase clock signals (CK1, CK2 . . . , CKN), which are applied to said phase detectors, respectively.

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