Modified susceptor for use in chemical vapor deposition process

• US 6,444,027 B1
• Filed: 05/08/2000
• Issued: 09/03/2002
• Est. Priority Date: 05/08/2000
• Status: Expired due to Term

• Current Assignee: GlobalWafers Co., Ltd. (Sino-American Silicon Products Incorporated)
• Original Assignee: MEMC Electronic Materials, Inc. (SunEdison, Inc.)
• Inventors: Standley, Robert W., Yang, Charles Chiun-Chieh
• Primary Examiner(s): KUNEMUND, ROBERT M
• Application Number:
  US09/566,890
• Time in Patent Office: 848 Days
• Field of Search: 117/200, 117/900, 117/88, 117/89, 118/725, 118/715
• US Class Current: 117/200
• CPC Class Codes: C23C 16/0227 by cleaning or etching
• CPC Class Codes: C23C 16/4584 the substrate being rotated
• CPC Class Codes: C30B 25/12 Substrate holders or susceptors
• CPC Class Codes: C30B 29/06 Silicon
• CPC Class Codes: Y10S 117/90 Apparatus characterized by composition or treatment thereof, e.g. surface finish, surface coating
• CPC Class Codes: Y10T 117/10 Apparatus

Abstract

A modified susceptor for use in an epitaxial deposition apparatus and process is disclosed. The modified susceptor has an inner annular ledge capable of supporting a semiconductor wafer and has a plurality of holes in the surface to allow cleaning gas utilized during an epitaxial deposition process to pass through the susceptor and contact substantially the entire back surface of the semiconductor wafer and remove a native oxide layer. Also, the plurality of holes on the susceptor allows dopant atoms out-diffused from the back surface during the epitaxial deposition process to be carried away from the front surface in an inert gas stream and into the exhaust such that autodoping of the front surface is minimized.

Claims

1. A susceptor for supporting a semiconductor wafer during a chemical vapor deposition process wherein an epitaxial silicon layer is grown on the semiconductor wafer, the semiconductor wafer having a front surface and a back surface, the susceptor comprising:

a porous surface in generally parallel, opposed relationship with the back surface of the semiconductor wafer supported by the susceptor to permit gas flow through the susceptor for contact with the back surface of said semiconductor wafer, the porous surface having a density of openings between about 0.2 openings/cm² and about 4 openings/cm²; and

an edge ring surrounding the periphery of the susceptor.

2. A susceptor as set forth in claim 1 wherein the susceptor is configured for supporting the semiconductor wafer in spaced relationship with at least a portion of the porous surface of the susceptor.

3. A susceptor as set forth in claim 1 wherein the susceptor has an annular inner ledge for supporting the semiconductor wafer.

4. A susceptor as set forth in claim 1 further comprising lift pin holes in the porous surface to allow lift pins to pass through the susceptor.

5. A susceptor as set forth in claim 1 wherein the openings have a diameter of between about 0.1 millimeters and about 3 millimeters.

6. A susceptor as set forth in claim 1 wherein the openings have a diameter of between about 0.1 millimeters and about 1 millimeter.

7. A susceptor as set forth in claim 1 wherein the openings have a diameter of between about 0.5 millimeters and about 1 millimeter.

8. A susceptor as set forth in claim 1 wherein the openings are spaced between about 2 millimeters and about 2 centimeters apart.

9. A susceptor as set forth in claim 1 wherein the openings are spaced between about 6 millimeters and about 1.5 centimeters apart.

10. A susceptor as set forth in claim 1 wherein the porous surface has between about 0.8 openings/cm² and about 1.75 openings/cm².

11. A susceptor as set forth in claim 1 wherein the susceptor is configured such that the semiconductor wafer supported by the susceptor rests directly on the porous surface.

12. Apparatus for supporting a semiconductor wafer in a chamber of the type having an interior space, a gas inlet for directing gas to flow into the interior space of the chamber and a gas outlet through which the gas is exhausted from the interoir space of the chamber, the wafer having a front surface and a back surface, said apparatus comprising:

a susceptor sized and configured for supporting the semiconductor wafer thereon within the interior space of the chamber, the susceptor having a porous surface having a density of openings of between about 0.5 openings/cm² and about 2 openings/cm², the porous surface being adapted to be in a generally parallel opposed relationship with the back surface of said semiconductor wafer and exposed to the interior of the chamber to permit gas flow inward through the porous surface for contact with the back surface of the semiconductor wafer and for further flow outward through the porous surface for exhaustion from the chamber via the gas outlet thereof while the semiconductor is supported by the susceptor.

13. Apparatus as set forth in claim 12 further comprising a support for supporting the susceptor within the interior space of the chamber such that the porous surface of the susceptor is substantially exposed to the gas flowing within the interior space of the chamber.

14. Apparatus as set forth in claim 13 wherein the support is rotatable within the interior space of the chamber to rotate the susceptor therein.

15. Apparatus as set forth in claim 12 further comprising a heating element.

16. Apparatus as set forth in claim 12 wherein the susceptor is configured for supporting the semiconductor wafer in spaced relationship with the porous surface.

17. Apparatus as set forth in claim 12 wherein the susceptor has an annular inner ledge for supporting the semiconductor wafer.

18. Apparatus as set forth in claim 12 further comprising an edge ring surrounding the periphery of the susceptor.

19. Apparatus as set forth in claim 12 wherein the openings have a diameter of between about 0.1 millimeters and about 3 millimeters.

20. Apparatus as set forth in claim 12 wherein the openings have a diameter of between 0.1 millimeters and about 1 millimeter.

21. Apparatus as set forth in claim 12 wherein the openings have a diameter of between about 0.5 millimeters and about 1 millimeter.

22. Apparatus as set forth in claim 12 wherein the openings are spaced between about 2 millimeters and about 2 centimeters apart.

23. Apparatus as set forth in claim 12 wherein the openings are spaced between about 6 millimeters and about 1.5 centimeters apart.

24. Apparatus as set forth in claim 12 wherein the porous surface has between about 0.8 openings/cm² and about 1.75 openings/cm².

25. Apparatus as set forth in claim 12 wherein the total percentage of open area on the porous surface is between about 0.5% and about 4%.

26. Apparatus as set forth in claim 12 wherein the total percentage of open area on the porous surface is between about 1% and about 3%.

27. A process for growing an epitaxial silicon layer on a semiconductor wafer, the semiconductor wafer having a front surface and a back surface, the process comprising:

introducing a cleaning gas into an epitaxial deposition chamber containing the semiconductor wafer such that the cleaning gas flows parallel to the front and back surfaces and contacts the front surface of the semiconductor wafer and substantially the entire back surface of the semiconductor wafer to remove a native oxide layer from the front surface and the back surface of the semiconductor wafer; and

introducing a silicon containing source gas into the epitaxial deposition chamber to grow an epitaxial silicon layer on the front surface of the semiconductor wafer while introducing a purge gas into the epitaxial deposition chamber to remove out-diffused dopant atoms from the back surface of the semiconductor wafer away from the front surface of the semiconductor wafer.

28. The process as set forth in claim 27 wherein the cleaning gas is hydrogen or a hydrogen/hydrochloric acid mixture.

29. The process as set forth in claim 27 wherein the purge gas is selected from the group consisting of nitrogen, argon, hydrogen, and any mixture thereof.

30. The process as set forth in claim 27 wherein the epitaxial layer is between about 0.1 micrometer and about 200 micrometers thick.

31. The process as set forth in claim 27 wherein the source gas is introduced above the front surface of the semiconductor wafer and the purge gas is introduced below the back surface of the semiconductor wafer.

32. The process as set forth in claim 27 wherein the wafer is substantially free of heat gradients during the process.

33. A susceptor for use in apparatus for performing a chemical vapor deposition process wherein an epitaxial silicon layer is grown on a semiconductor wafer having a front surface and a back surface, said apparatus being of the type having a chamber, a gas inlet for directing gas into the chamber, a gas outlet through which gas is exhausted from the chamber, and the susceptor disposed in the chamber for supporting the wafer therein, said susceptor comprising:

a porous portion having openings therein extending through the susceptor from a first side to a second side thereof, the susceptor being configured for supporting the semiconductor wafer such that the back surface of said wafer is in opposed relationship with the first side of the porous portion of the susceptor to permit gas in the chamber to flow through the susceptor from the second side of the porous portion of the susceptor to said first side to facilitate the substantially free flow of said gas inward through the openings for contact with the back surface of the semiconductor wafer;

at least some of said openings in the porous portion of the susceptor being located therein such that when the semiconductor wafer is supported by the susceptor the at least some of said openings are disposed radially inward of a peripheral edge of the wafer.

34. A susceptor as set forth in claim 33 wherein the openings in the porous portion of the susceptor are distributed substantially uniformly over the porous portion of the susceptor.

35. A susceptor as set forth in claim 34 wherein the porous portion of the susceptor has a generally circular surface area over which the openings are distributed.

36. Apparatus for use in an epitaxial deposition process wherein an epitaxial silicon layer is grown on a semiconductor wafer, the semiconductor wafer having a front surface and a back surface, said apparatus comprising:

a susceptor having a porous portion having openings therein extending through the susceptor from a first side to a second side thereof, the susceptor being configured for supporting the semiconductor wafer such that the back surface of said wafer is in opposed relationship with the first side of the porous portion of the susceptor to permit gas to flow through the susceptor from the second side of the porous portion of the susceptor to said first side to facilitate the substantially free flow of said gas inward through the openings for contact with the back surface of the semiconductor wafer;

at least some of said openings in the porous portion of the susceptor being located therein such that when the semiconductor wafer is supported by the susceptor the at least some of said openings are disposed radially inward of a peripheral edge of the wafer; and

a source of gas capable of directing said gas to flow over substantially the entire second side of the porous portion of the susceptor in fluid communication with the openings to permit said gas to flow inward through the openings for contacting the back surface of the wafer.

37. Apparatus as set forth in claim 36 wherein the source of gas is capable of directing said gas to flow over the second side of the porous portion of the susceptor in a direction generally parallel to said porous portion of the susceptor.

38. A susceptor for supporting a semiconductor wafer during a chemical vapor deposition process wherein an epitaxial silicon layer is grown on the semiconductor wafer, the semiconductor wafer having a front surface and a back surface, the susceptor comprising:

a porous surface in generally parallel, opposed relationship with the back surface of the semiconductor wafer supported by the susceptor to permit gas flow through the susceptor for contact with the back surface of said semiconductor wafer, the porous surface having a density of openings between about 0.2 openings/cm² and about 4 openings/cm², the total percentage of open area on the porous surface being between about 0.5% and about 4%.

39. A susceptor as set forth in claim 38 wherein the total percentage of open area on the porous surface is between about 1% and about 3%.

40. Apparatus for use in an epitaxial deposition process wherein an epitaxial silicon layer is grown on a semiconductor wafer, the semiconductor wafer having a front surface and a back surface, said apparatus comprising:

a deposition chamber defining an interior space and having a gas inlet through which a gas is directed to flow into the interior space of the chamber and a gas outlet through which the gas is exhausted from the interior space of the chamber;

a susceptor disposed in the interior space of the chamber and having a porous portion having openings therein extending through the susceptor from a first side to a second side thereof, the susceptor being configured for supporting the semiconductor wafer such that the back surface of said wafer is in opposed relationship with the first side of the porous portion of the susceptor; and

a susceptor support for supporting the susceptor in the chamber such that the second side of the susceptor is exposed to the interior of the chamber to permit to facilitate the substantially free flow of said gas inward through the porous surface of the susceptor for contact with the back surface of the semiconductor wafer and for further flow outward through said porous surface of the susceptor for exhaustion from the chamber via the gas outlet thereof.

41. A process for treating the back surface of a semiconductor wafer with a gas, the semiconductor wafer having a front surface and a back surface, the process comprising:

loading the wafer into a susceptor disposed in the interior space of a chamber, the susceptor having a porous portion having openings therein extending through the susceptor from a first side to a second side thereof, said loading step comprising loading the wafer into the susceptor such that the back surface of the wafer is in opposed relationship with the first side of the porous portion of susceptor;

supporting the susceptor in the interior space of the chamber such that the second side of the susceptor is exposed to the interior space of the chamber;

directing gas to flow into the interior space of the chamber to facilitate the substantially free flow of said gas inward through the porous surface of the susceptor for contact with the back surface of the semiconductor wafer to treat said back surface to facilitate to the further flow of said gas outward through said porous surface of the susceptor back into the interior space of the chamber; and

exhausting said gas from the interior space of the chamber.

42. A process as set forth in claim 41, further comprising the step of rotating the susceptor within the interior space of the chamber as glow is directed to flow into the interior space of the chamber.