Structure and method for correction of defective analog data in a nonvolatile semiconductor memory

• US 6,445,602 B1
• Filed: 10/26/1999
• Issued: 09/03/2002
• Est. Priority Date: 10/28/1998
• Status: Expired due to Term

• Current Assignee: MediaTek Singapore Pte. Ltd. (MediaTek, Inc.)
• Original Assignee: NuCORE Technology, Inc. (MediaTek, Inc.)
• Inventors: Nakasone, Youichi, Okamoto, Fumitaka, Kokudo, Shingo
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): LE, THONG QUOC
• Application Number:
  US09/427,838
• Time in Patent Office: 1,043 Days
• Field of Search: 365/45, 365/233, 365/194, 365/93, 365/49, 365/191
• US Class Current: 365/45
• CPC Class Codes: G11C 27/00 Electric analogue stores, e.g. for storing instantaneous values
• CPC Class Codes: G11C 27/005 with non-volatile charge storage, e.g. on floating gate or MNOS

Abstract

A nonvolatile semiconductor memory includes a memory unit, memory control unit, defect position detection unit, and data correction unit. The memory unit has a plurality of memory cells to discretely store an analog signal such as an image signal as analog data in the form of an analog value. The memory control unit sequentially selects the memory cells as a read out target of the memory unit in response to a predetermined clock. The defect position detection unit detects, on the basis of defect position information indicating a position of defective analog data included in the analog data read out from the memory unit, whether a memory cell corresponding to the defect position is selected by the memory control unit, and outputs a detection output. The data correction unit corrects the analog data at the defect position in accordance with the detection output from the defect position detection unit by using another analog data of the analog signal stored in said memory unit.

Claims

1. A nonvolatile semiconductor memory comprising:

a memory unit having a plurality of memory cells to discretely store an analog signal, such as an image signal, as analog data in the form of an analog value;

a memory control unit for sequentially selecting said memory cells as a read out target of said memory unit in response to a predetermined clock;

a defect position detection unit for detecting, on the basis of defect position information indicating a position of defective analog data included in the analog data read out from said memory unit, whether a memory cell corresponding to the defect position is selected by said memory control unit, and outputting a detection output; and

a data correction unit for correcting the analog data at the defect position in accordance with the detection output from said defect position detection unit by using another analog data of the analog signal stored in said memory unit.

2. A memory according to claim 1, wherein said data correction unit comprises:

a delay unit for delaying the analog data output from said memory unit by at least one data period and outputting the delayed analog data; and

a signal switching unit for directly outputting the analog data output from said memory unit if said detection output indicates that a memory cell corresponding to the defect position is not selected by said memory control unit, and switchingly outputting a first delayed analog data output from said delay unit in place of defective analog data corresponding to the defect position if said detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit, said first delayed analog data corresponding to analog data read out from said memory unit prior to the defective analog data.

3. A memory according to claim 1, wherein said data correction unit comprises:

a delay unit for delaying the analog data read out from said memory unit by at least one data period and outputting the delayed analog data; and

a signal switching unit for outputting the analog data delayed by and output from said delay unit if said detection output indicates that a memory cell corresponding to the defect position is not selected by said memory control unit, and switchingly outputting directly a first analog data if said detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit, said first analog data corresponding to analog data read out from said memory unit after the defective analog data.

4. A memory according to claim 1, wherein said data correction unit comprises:

a first delay unit for delaying the analog data read out from said memory unit by at least one data period and outputting the delayed analog data;

a second delay unit for delaying the analog data read out from said memory unit by a period longer than a delay period of said first delay unit and outputting the delayed analog data;

an interpolating arithmetic unit for performing an arithmetic operation of the analog data read out from said memory unit and the analog data delayed by and output from said second delay unit, to output interpolated analog data of the analog data delayed by and output from said first delay unit; and

a signal switching unit for outputting the analog data delayed by and output from said first delay unit if said detection output indicates that a memory cell corresponding to the defect position is not selected by said memory control unit, and switchingly outputting the interpolated analog data output from said interpolating arithmetic unit in place of analog data corresponding to the defect position if said detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit.

5. A memory according to claim 1, wherein:

said memory unit comprises means for, when an arbitrary memory cell is selected by said memory control unit, outputting analog data read out from said selected memory cell as selected analog data, and separately outputting analog data read out from another memory cell corresponding to the selected memory cell as correction analog data; and

said data correction unit comprises a signal switching unit for outputting the selected analog data read out from said memory unit if said detection output indicates that a memory cell corresponding to the defect position is not selected by said memory control unit, and switchingly outputting the correction analog data output from said memory unit in place of the selected analog data corresponding to the defect position if said detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit.

6. A memory according to claim 1, wherein:

said memory unit comprises means for, when an arbitrary memory cell is selected by said memory control unit, outputting analog data read out from said selected memory cell as selected analog data, and separately outputting analog data read out from a plurality of other memory cells corresponding to the selected memory cell as correction analog data; and

said data correction unit comprises;

an interpolating arithmetic unit for performing a product sum arithmetic operation of the correction analog data read out from said memory unit, to output interpolated analog data of said selected memory cell; and

a signal switching unit for outputting the selected analog data read out from said memory unit if said detection output indicates that a memory cell corresponding to the defect position is not selected by said memory control unit, and switchingly outputting the interpolated analog data output from said interpolating arithmetic unit in place of the selected analog data corresponding to the defect position if said detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit.

7. A memory according to claim 1, wherein said data correction unit includes a signal switching unit for switchingly outputting a first analog data in place of the analog data corresponding to the defect position when the detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit, said first analog data being read out from said memory unit prior to the analog data corresponding to the defect position.

8. A memory according to claim 1, wherein said data correction unit includes a signal switching unit for switchingly outputting a first analog data in place of the analog data corresponding to the defect position when the detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit, said first analog data being read out from said memory unit after the analog data corresponding to the defect position.

9. A memory according to claim 1, wherein said data correction unit includes a signal switching unit for switchingly outputting an interpolated analog data in place of the analog data corresponding to the defect position when the detection output indicates that a memory cell corresponding to the defect position is selected by said memory control unit, said interpolated analog data being obtained from a first analog data and a second analog data, said first analog data being read out from said memory unit prior to the analog data corresponding to the defect position, and said second analog data being read out from said memory unit after the analog data corresponding to the defect position.

13. A memory according to claim 1, further comprising:

an input defect position detection unit for detecting defective data on the analog signal on the basis of input defect position information indicating a position of the defective data included in the analog signal input to said memory unit; and

an input data correction unit for correcting the analog data at the defect position by using other analog data on the analog signal.

17. A memory according to claim 1, wherein said defect position detection unit uses, as the defect position information, information indicating a position of the defective data included in the analog signal input to said memory unit.

21. A memory according to claim 1, wherein said defect position detection unit uses, as the defect position information, both information indicating a position of a defective memory cell present in said memory unit, and information indicating a position of defective data included in the analog signal input to said memory unit.

10. A nonvolatile semiconductor memory comprising:

a memory unit having a plurality of memory cells to discretely store an analog signal such as an image signal, as analog data in the form of an analog value;

a memory control unit for sequentially selecting said memory cells as a read out target of said memory unit in response to a predetermined clock;

a defect position detection unit for detecting, on the basis of defect position information indicating a position of defective analog data included in the analog data read out from said memory unit, whether a memory cell corresponding to the defect position is selected by said memory control unit, and outputting a detection output; and

a memory select switching unit arranged between said memory control unit and said memory unit to switchingly select another memory cell in place of said memory cell corresponding to the defect position if said detection output indicates that the memory cell corresponding to the defect position is selected by said memory control unit, said another memory cell storing analog data of said analog signal.

14. A memory according to claim 10, further comprising:

an input defect position detection unit for detecting defective data on the analog signal on the basis of input defect position information indicating a position of the defective data included in the analog signal input to said memory unit; and

an input data correction unit for correcting the analog data at the defect position by using other analog data on the analog signal.

18. A memory according to claim 10, wherein said defect position detection unit uses, as the defect position information, information indicating a position of the defective data included in the analog signal input to said memory unit.

22. A memory according to claim 10, wherein said defect position detection unit uses, as the defect position information, both information indicating a position of a defective memory cell present in said memory unit, and information indicating a position of defective data included in the analog signal input to said memory unit.

11. A nonvolatile semiconductor memory for storing an image signal indicating a color image obtained by an image sensing element such as a color CCD and having luminance values of primary colors that are different according to pixel positions of the color image, the luminance values being sequentially arranged on a time axis in the form of analog values, comprising:

a memory unit having a plurality of memory cells to discretely store the luminance values at the respective pixel positions stored on the image signal as analog luminance data in the form of an analog value;

a memory control unit for sequentially selecting said memory cells as a read out target of said memory unit in response to a predetermined clock;

a data conversion unit for performing an arithmetic process of a plurality of other analog luminance data at pixel positions that are adjacent on the color image to each of selected pixel positions corresponding to selected analog luminance data stored in said selected memory cells, to calculate the analog luminance data of the primary colors at the selected pixel positions, and for outputting the calculated data as color image data; and

a defect position detection unit for detecting, on the basis of defect position information indicating a position of defective data included in the analog luminance data read out from said memory unit, whether the analog luminance data used by said data conversion unit includes defective data, and outputting a detection output,

wherein said memory unit comprises means for, when an arbitrary memory cell is selected by said memory control unit, outputting analog luminance data stored in said selected memory cell as selected analog luminance data, and reading out a plurality of other analog luminance data at pixel positions that are adjacent on a color image to selected pixel positions corresponding to the selected analog luminance data, and outputting the readout data from said memory cells, and

said data conversion unit has;

a data selection unit for outputting a plurality of the analog luminance data used for an arithmetic process if the detection output indicates that the analog luminance data used for the arithmetic process does not include defective data, and switchingly outputting in place of the defective data another one of the analog luminance data used for the arithmetic process if the detection output indicates that the analog luminance data used for the arithmetic process includes defective data; and

an arithmetic processing unit for performing an arithmetic process of the analog luminance data output from said data selection unit to calculate analog luminance data of the primary colors.

15. A memory according to claim 11, further comprising:

an input defect position detection unit for detecting defective data on the image signal on the basis of input defect position information indicating a position of the defective data included in the image signal input to said memory unit; and

an input data correction unit for correcting the analog luminance data at the defect position by using other analog luminance data on the image signal.

19. A memory according to claim 11, wherein said defect position detection unit uses, as the defect position information, information indicating a position of the defective data included in the image signal input to said memory unit.

23. A memory according to claim 11, wherein said defect position detection unit uses, as the defect position information, both information indicating a position of a defective memory cell present in said memory unit, and information indicating a position of defective data included in the image signal input to said memory unit.

12. A nonvolatile semiconductor memory for storing an image signal indicating a color image obtained by an image sensing element such as a color CCD and having luminance values of primary colors that are different according to pixel positions of the color image, the luminance values being sequentially arranged on a time axis in the form of analog values, comprising:

a memory unit having a plurality of memory cells to discretely store the luminance values at the respective pixel positions stored on the image signal as analog luminance data in the form of an analog value;

a memory control unit for sequentially selecting said memory cells as a read out target of said memory unit in response to a predetermined clock;

a data conversion unit for performing an arithmetic process of a plurality of other analog luminance data at pixel positions that are adjacent on the color image to each of selected pixel positions corresponding to selected analog luminance data stored in said selected memory cells, to calculate the analog luminance data of the primary colors at the selected pixel positions, and for outputting the calculated data as color image data; and

a defect position detection unit for detecting, on the basis of defect position information indicating a position of defective data included in the analog luminance data read out from said memory unit, whether the analog luminance data used by said data conversion unit includes defective data, and outputting a detection output,

wherein said memory unit comprises means for, when an arbitrary memory cell is selected by said memory control unit, outputting analog luminance data stored in said selected memory cell as selected analog luminance data, and reading out a plurality of other analog luminance data at pixel positions that are adjacent on the color image to selected pixel positions corresponding to the selected analog luminance data, and outputting the readout data from said memory cells, and

said data conversion unit has;

a synthesizer for amplifying the plurality of analog luminance data used for the arithmetic process and thereafter synthesizing the amplified analog luminance data; and

a gain setting unit for setting a gain value corresponding to each of the plurality of analog luminance data used for the arithmetic process to be equal if the detection output indicates that the analog luminance data used for the arithmetic process does not include defective data, and decreasing a gain value corresponding to defective data and uniformly increasing gain values corresponding to other correct analog luminance data if the detection output indicates that the analog luminance data used for the arithmetic process includes defective data.

16. A memory according to claim 12, further comprising:

an input defect position detection unit for detecting defective data on the image signal on the basis of input defect position information indicating a position of the defective data included in the image signal input to said memory unit; and

an input data correction unit for correcting the analog luminance data at the defect position by using other analog luminance data on the image signal.

20. A memory according to claim 12, wherein said defect position detection unit uses, as the defect position information, information indicating a position of the defective data included in the image signal input to said memory unit.

24. A memory according to claim 12, wherein said defect position detection unit uses, as the defect position information, both information indicating a position of a defective memory cell present in said memory unit, and information indicating a position of defective data included in the image signal input to said memory unit.