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Dynamic range reduction circuitry for a digital communications receiver

  • US 6,445,732 B1
  • Filed: 09/23/1998
  • Issued: 09/03/2002
  • Est. Priority Date: 09/23/1998
  • Status: Expired due to Fees
First Claim
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1. A digital communications receiver comprising:

  • an antenna for receiving a signal;

    a demodulator coupled to the antenna for demodulating the signal to obtain an information signal;

    a signal level adjustment circuit coupled to the demodulator for adjusting the power level of the information signal to provide an adjusted signal;

    a control circuit coupled to the signal level adjustment circuit for controlling the same responsive to a parameter of the received signal;

    wherein the control circuit is a processor configured to compare a parameter estimate with a plurality of predetermined levels that correspond to an estimated location of the receiver in relation to a transmitter that transmitted the signal, and, responsive thereto, controlling the signal level adjustment circuit by selecting one of a plurality of discrete signal adjustment levels, the signal adjustment levels being relatively high when the estimated location of the receiver in relation to the transmitter is relatively close and relatively low when the estimated location of the receiver in relation to the transmitter is relatively distant, the predetermined levels being set in a manner to prevent excessive signal adjustment level changes;

    a signal parameter estimator coupled to the control circuit for providing an estimate of the parameter of the received signal to the control circuit;

    an analog to digital converter for converting the adjusted signal to a digital signal.

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