Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners

• US 6,448,153 B2
• Filed: 12/28/2000
• Issued: 09/10/2002
• Est. Priority Date: 10/29/1996
• Status: Expired due to Term

• Current Assignee: Adeia Semiconductor Technologies LLC (f/k/a Invensas Corporation) (Adeia Inc.)
• Original Assignee: Tru-Si Technologies, Inc.
• Inventors: Halahan, Patrick, Savastiouk, Sergey, Siniaguine, Oleg
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): Roman, Angel
• Application Number:
  US09/752,802
• Publication Number:
  US 20010001215A1
• Time in Patent Office: 621 Days
• Field of Search: 438/460, 438/462, 438/977
• US Class Current: 438/460
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 23/482 consisting of lead-in layers inseparably applied to the semiconductor body electrodes H01L29/40
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/10158 at the passive surface
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A semiconductor wafer is diced before thinning. The wafer is diced only part of the way through, to form grooves which are at least as deep as the final thickness of each chip to be obtained from the wafer. Then, the wafer is placed into a non-contact wafer holder, and the wafer backside is blanket etched with a dry etch, for example, atmospheric pressure plasma etch. The wafer is thinned until the grooves are exposed from the backside. The dry etch leaves the chip'"'"'s backside smooth. After the grooves have been exposed, the dry etch is continued to remove damage from the chip sidewalls and to round the chips'"'"' bottom edges and coners. As a result, the chip becomes more reliable, and in particular more resistant to thermal and other stresses.

Claims

1. A method for obtaining one or more chips from a semiconductor wafer, the method comprising:

forming one or more openings in a first side of the semiconductor wafer along a boundary of the one or more chips, wherein the one or more openings do not go through the wafer; and

placing the wafer into a non-contact wafer holder and thinning the wafer with a dry etch to remove material from an entire second side of the wafer at least until the one or more openings become exposed on the second side, wherein the dry etch rounds one or more of the edges and/or coners obtained on the second side of the wafer at a location of the one or more openings when the one or more openings become exposed.

2. The method of claim 1 wherein the one or more openings comprise a groove extending along the entire boundary of at least one chip.

3. The method of claim 2 wherein the wafer holder comprises one or more vortex chucks each of which emits a gas vortex towards the wafer to hold the wafer in the holder.

4. The method of claim 2 further comprising, after forming the one or more openings but before thinning the wafer, attaching the first side of the wafer to a layer which remains on the wafer while the wafer is thinned.

5. The method of claim 2 further comprising, after forming the one or more openings, forming a protective layer on the first side over the one or more openings, the protective layer protecting the first side of the wafer during the dry etch from an etchant penetrating through the one or more openings from the second side and damaging the first side when the one or more openings become exposed on the second side.

6. The method of claim 5 wherein the layer does not cover the entire first side of the wafer.

7. The method of claim 5 wherein the layer covers the entire first side of the wafer.

8. The method of claim 2 wherein the dry etch comprises an atmospheric pressure plasma etch.

9. The method of claim 2 wherein after the groove is exposed from the second side, the dry etch continues and smoothens the groove'"'"'s sidewall.

10. The method of claim 2 wherein the semiconductor wafer comprises circuitry made at the first side of the wafer, the second side is a backside opposite to the first side, and the groove is formed along a scribe line on the first side.

11. The method of claim 2 wherein the groove is formed with a diamond saw or a laser.

12. The method of claim 1 wherein the dry etch rounds all of the edges and coners on the second side of each semiconductor chip obtained from the wafer in the dry etch.

13. The method of claim 2 wherein from a start of the thinning operation until the groove is exposed, the dry etch etches the second side of the wafer uniformly.

14. The method of claim 2 wherein the entire dry etch is an unmasked etch of the second side.

15. The method of claim 2 wherein the dry etch results in the chip being separated from the rest of the wafer.

16. A method for obtaining one or more chips from a semiconductor wafer, the method comprising:

forming one or more openings in a first side of the semiconductor wafer along a boundary of the one or more chips, wherein the one or more openings do not go through the wafer; and

thinning the wafer with a dry etch to remove material from an entire second side of the wafer at least until a through hole is formed at a location of each of the one or more openings, wherein the dry etch rounds one or more of the edges and/or coners obtained on the second side of the wafer during the etch at a location of the one or more through holes.

17. The method of claim 16 wherein throughout the dry etch the wafer is held in a non-contact wafer holder.

18. The method of claim 16 wherein the one or more openings comprise a groove extending along the entire boundary of at least one chip, and the dry etch results in the chip being separated from the rest of the wafer.

19. The method of claim 16 wherein the dry etch continues after the through hole is formed at the location of each of the one or more openings.

20. A method for obtaining one or more chips from a semiconductor wafer, the method comprising:

forming one or more openings in a first side of the semiconductor wafer along a boundary of the one or more chips, wherein the one or more openings do not go through the wafer; and

thinning the wafer with a dry etch to remove material from an entire second side of the wafer at least until a semiconductor sidewall of at least the one or more openings is exposed on the second side, such that at some time during the dry etch, the semiconductor sidewall has a portion spaced from the second side but reachable from the second side through the opening.

21. The method of claim 20 wherein throughout the dry etch the wafer is held in a non-contact wafer holder.

22. The method of claim 20 wherein the one or more openings comprise a groove extending along the entire boundary of at least one chip, and the dry etch results in the chip being separated from the rest of the wafer.

23. A method for obtaining one or more chips from a semiconductor wafer, the method comprising:

forming one or more openings in a first side of the semiconductor wafer along a boundary of the one or more chips, wherein the one or more openings do not go through the wafer; and

etching an entire second side of the wafer with a dry etch at least until the one or more openings become exposed on the second side, wherein the dry etch rounds one or more of the edges and/or coners obtained on the second side of the wafer at a location of the one or more openings when the one or more openings become exposed.

24. The method of claim 23 wherein the one or more openings comprise a groove extending along the entire boundary of at least one chip.

25. The method of claim 24 wherein after the groove is exposed from the second side, the dry etch continues and smoothens the groove'"'"'s sidewall.

26. The method of claim 24 wherein the semiconductor wafer comprises circuitry made at the first side of the wafer, the second side is a backside opposite to the first side, and the groove is formed along a scribe line on the first side.

27. The method of claim 23 wherein the dry etch rounds all of the edges and corners on the second side of each semiconductor chip obtained from the wafer in the dry etch.

28. The method of claim 23 wherein the dry etch results in the chip being separated from the rest of the wafer.