DAC using current source driving main resistor string

• US 6,448,917 B1
• Filed: 09/25/2000
• Issued: 09/10/2002
• Est. Priority Date: 05/31/2000
• Status: Expired due to Term

• Current Assignee: Silicon Labs CP, Inc. (Silicon Laboratories Incorporated)
• Original Assignee: Cygnal Integrated Products, Inc. (Silicon Laboratories Incorporated)
• Inventors: Leung, Ka Y., Holberg, Douglas R.
• Primary Examiner(s): JEAN PIERRE, PEGUY
• Application Number:
  US09/668,882
• Time in Patent Office: 715 Days
• Field of Search: 341/143, 341/144, 341/154
• US Class Current: 341/144
• CPC Class Codes: H03M 1/0663 using clocked averaging
• CPC Class Codes: H03M 1/682 both converters being of the unary decoded type
• CPC Class Codes: H03M 1/765 using a single level of switches which are controlled by unary decoded digital signals

Abstract

An digital-to-analog converter having main DAC resistor strings and sub-DAC resistor strings for converting MSB and LSB portions of a digital word into corresponding analog voltages. The main DAC resistor strings are driven by constant current sources to improve the linearity of the conversion process. The constant current sources present a high impedance to the main DAC resistor strings, thereby providing a more linear change in resistance during the conversion process, and reducing second-order harmonic nonlinearity.

Claims

1. A digital-to-analog converter, comprising:

a first resistor string for generating a plurality of analog voltages;

a second resistor string for generating a plurality of analog voltages;

a selection circuit responsive to one or more most significant bits of a digital word for selecting an analog voltage from said first resistor string, and for coupling the selected analog voltage to said second resistor string; and

a high impedance driver for driving said first resistor string, thereby providing improved linearity in the digital-to-analog conversion.

2. The digital-to-analog converter of claim 1, wherein said high impedance driver comprises a constant current source.

3. The digital-to-analog converter of claim 1, further including a switch multiplexer defined by said selection circuit, for selecting a voltage across one or more resistors of said first resistor string, and whereby when said switches sequentially select a voltage across each said resistor, a change in impedance as seen by said switch multiplexer is linear.

4. The digital-to-analog converter of claim 2, wherein said constant current source comprises a pair of cascode-coupled transistors to thereby provide a high impedance to said first resistor string.

5. The digital-to-analog converter of claim 4, wherein an impedance of said cascode-coupled transistors is in the range of about 10 megohm to about 500 megohm.

6. The digital-to-analog converter of claim 5, wherein one transistor of said cascode-coupled transistors is driven by a bias voltage.

7. The digital-to-analog converter of claim 6, wherein a second transistor of said cascode-coupled transistors is driven by an operational amplifier.

8. The digital-to-analog converter of claim 1, wherein said first resistor string defines a first main DAC resistor string, and further including a second main DAC resistor string, and further including a constant current source for individually driving each said first and second main DAC resistor strings.

9. The digital-to-analog converter of claim 8, wherein a bottom end of said first and second main DAC resistor strings are connected to a low impedance.

10. The digital-to-analog converter of claim 9, wherein said low impedance comprises a ground potential.

11. The digital-to-analog converter of claim 1, further including an offset resistor connected to said first resistor string for providing a voltage offset function to circuits connected to said second resistor string.

12. The digital-to-analog converter of claim 11, further including a head room resistor connected to said first resistor string for providing an operational headroom voltage function for circuits connected to said second resistor string.

13. The digital-to-analog converter of claim 8, wherein said selection circuit couples a voltage from said first resistor string in parallel across all resistors of said second resistor string.

14. The digital-to-analog converter of claim 1, further including a constant current source for driving said first resistor string, and a constant current source for driving said second resistor string.

15. The digital-to-analog converter of claim 14, further including a circuit for mirroring the current in a specified ratio from said first resistor string to said second resistor string.

16. The digital-to-analog converter of claim 15, wherein said ratio is a function of the ratio of the resistance of said first resistor string to the resistance of said second resistor string.

17. A method of providing digital-to-analog conversion, comprising the steps of:

driving a first resistor string having a plurality of nodes to produce a corresponding plurality of different voltages;

driving said first resistor string with a high impedance source to thereby reduce non-linearity errors;

coupling one of said plurality of different voltages from said first resistor string to a second resistor string;

selecting one said voltage of said plurality of different voltages for coupling to said second resistor string, as a function of bits of a digital word; and

providing an analog output voltage from said second resistor string.

18. The method of claim 17, further including driving said first resistor string with a constant current source.

19. The method of claim 18, further including driving a constant current through said first resistor string to a ground potential.

20. The method of claim 17, further including driving said first resistor string with a constant current source comprised of a first transistor connected in series with a second transistor to thereby provide an increased impedance.

21. A digital-to-analog converter, comprising:

a first main DAC resistor string;

a second main DAC resistor string;

respective constant current sources driving said first and second main DAC resistor strings;

a first sub-DAC resistor string;

a second sub-DAC resistor string;

respective constant current sources driving said first and second sub-DAC resistor strings;

a constant current driven in each said sub-DAC resistor string being a predefined ratio of current driven in each said main DAC resistor string, said current ratio being a function of a ratio of resistance of a main DAC resistor string to a sub-DAC resistor string;

a first switch multiplexer for selecting a voltage from each said main DAC resistor strings as a function of bits of a digital word, and coupling the selected voltages to said sub-DAC resistor strings; and

a second switch multiplexer for selecting a voltage from said sub-DAC resistor strings as a function of other bits of the digital word.

22. The digital-to-analog converter of claim 21, wherein each said constant current source comprises cascode-connected transistors.

23. The digital-to-analog converter of claim 21, wherein respective constant currents are driven through said main DAC resistor strings to ground.

24. The digital-to-analog converter of claim 21, further including a constant current sink connected to each said sub-DAC resistor string, whereby a constant current is applied to each said sub-DAC resistor string at one respective end thereof, and said constant current is sunk at an opposite end thereof by said constant current sinks.