Composite laminate circuit structure and method of forming the same

• US 6,451,509 B2
• Filed: 01/02/2001
• Issued: 09/17/2002
• Est. Priority Date: 12/02/1998
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Markovich, Voya R., Wilson, William E., Perrino, Marybeth, Paoletti, Jim P., Keesler, Ross W.
• Primary Examiner(s): Huff, Mark F.
• Assistant Examiner(s): CHACKO DAVIS, DABORAH
• Application Number:
  US09/753,015
• Publication Number:
  US 20010023044A1
• Time in Patent Office: 623 Days
• Field of Search: 430/311-313, 430/317, 427/96, 216/13, 361/704, 174/261-262
• US Class Current: 430/311
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/09536 Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/096 Vertically aligned vias, holes or stacked vias
• CPC Class Codes: H05K 2201/09809 Coaxial layout
• CPC Class Codes: H05K 3/0023 by exposure and development of a photosensitive insulating layer
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/4623 the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards H05K3/462 takes precedence
• CPC Class Codes: H05K 3/4641 having integrally laminated metal sheets or special power cores

Abstract

A method forming a composite laminate structure includes providing first and second circuit board element each having circuitry on at least one face thereof and plated through holes. A voltage plane element is provided having at least one voltage plane having opposite faces with layers of partially cured photodielectric material on each face. At least one hole is photopatterned and etched through the voltage plane element but completely isolated from the voltage plane. Each through hole in the voltage plane element is aligned with a plated through hole in each of the circuit board elements to provide a surface on the voltage plane element communicating with the plated through holes. The voltage plane is laminated between the circuit board elements and the photoimageable material on the voltage plane is fully cured. The surfaces of the voltage plane element communicating with the plated through holes in the circuit board elements are plated with a conducting material to establish a connection between the circuitry on the first and second circuit board elements.

Claims

1. A method of forming a composite laminate structure comprising the steps of:

providing first and second circuit board elements, each having city on at least one face thereof and plated through holes,

providing a voltage plane element having at least one voltage plane having opposite faces with a layer of partially cured photopatternable dielectric material on each face thereof,

photopatterning and etching at least one hole through said voltage plane element and at least one through each layer of photopatternable dielectric material terminating at said voltage plane,

thereafter aligning each through hole and each opening in said voltage plane element with a plated through hole in at least one of said circuit board elements to provide surface on said voltage plane element communicating with said plated through holes and with said at least one face of each of said circuit board elements being oriented away from said voltage plane element,

thereafter laminating said voltage plane element between said circuit board elements and fully curing said photopatternable dielectric material of said voltage plane element, and

thereafter plating the surfaces on said voltage plane element communicating with said plated trough holes in said circuit board elements and said plated through holes in said circuit hoard elements.

2. The invention as defined in claims 1 wherein said circuit board elements are formed at least a part from fully cured photoimageable material.

3. The invention as defined in claim 1 wherein there is circuitry on each face of said circuit board elements.

4. The invention as defined in claim 1 wherein said surfaces are plated using photolithographic technique.

5. The invention as defined in claim 1 wherein the plating is copper plating.

6. The invention as defined in claim 1 wherein said voltage plane element has a single voltage plane.

7. The invention as defined in claim 1 wherein each circuit board element has at least one voltage plane.

8. The invention as defined in claim 7 wherein each circuit board element has plated through holes extending through said at least one voltage plane.

9. The invention as defined in claim 1 wherein at least one circuit board element has a plurality of voltage planes.

10. The invention as defined in claim 1 wherein said photopatterned dielectric material is an epoxy.