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MEMS wafer level package

  • US 6,452,238 B1
  • Filed: 09/27/2000
  • Issued: 09/17/2002
  • Est. Priority Date: 10/04/1999
  • Status: Expired due to Term
First Claim
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1. A micro-electromechanical wafer level encapsulated device, comprising:

  • a plurality of devices fabricated on a semiconductor substrate wafer, a cap wafer fabricated from a silicon wafer, and an array of cavities of predetermined height etched in a pattern corresponding to the active devices on said substrate wafer, and a thin film of glass covering the unetched area, a hermetic seal produced by bonding the cap wafer to the semiconductor wafer using said thin film glass as a bonding agent such that each of said discrete devices is sealed in a cavity of predetermined dimensions, at least one conductor formed on the surface of the substrate wafer which provides electrical coupling to each device fabricated on the substrate wafer, and an array of holes fabricated in the cap wafer which provides access to each of said conductors from outside the cavity.

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