MEMS wafer level package
First Claim
1. A micro-electromechanical wafer level encapsulated device, comprising:
- a plurality of devices fabricated on a semiconductor substrate wafer, a cap wafer fabricated from a silicon wafer, and an array of cavities of predetermined height etched in a pattern corresponding to the active devices on said substrate wafer, and a thin film of glass covering the unetched area, a hermetic seal produced by bonding the cap wafer to the semiconductor wafer using said thin film glass as a bonding agent such that each of said discrete devices is sealed in a cavity of predetermined dimensions, at least one conductor formed on the surface of the substrate wafer which provides electrical coupling to each device fabricated on the substrate wafer, and an array of holes fabricated in the cap wafer which provides access to each of said conductors from outside the cavity.
1 Assignment
0 Petitions
Accused Products
Abstract
An improved wafer level encapsulated micro-electromechanical device fabricated on a semiconductor wafer and a method of manufacture using state-of-the-art wafer fabrication and packaging technology. The device is contained within a hermetic cavity produced by bonding a silicon wafer with active circuits to an etched silicon wafer having cavities which surround each device, and bonding the two wafer by either thin film glass seal or by solder seal. The etched wafer and thin film sealing allow conductors to be kept to a minimum length and matched for improved electrical control of the circuit. Further, the device has capability for a ground ring in the solder sealed device. The devices may be packaged in plastic packages with wire bond technology or may be solder connected to an area array solder connected package.
155 Citations
11 Claims
-
1. A micro-electromechanical wafer level encapsulated device, comprising:
-
a plurality of devices fabricated on a semiconductor substrate wafer, a cap wafer fabricated from a silicon wafer, and an array of cavities of predetermined height etched in a pattern corresponding to the active devices on said substrate wafer, and a thin film of glass covering the unetched area, a hermetic seal produced by bonding the cap wafer to the semiconductor wafer using said thin film glass as a bonding agent such that each of said discrete devices is sealed in a cavity of predetermined dimensions, at least one conductor formed on the surface of the substrate wafer which provides electrical coupling to each device fabricated on the substrate wafer, and an array of holes fabricated in the cap wafer which provides access to each of said conductors from outside the cavity. - View Dependent Claims (2, 3, 4, 5, 7)
-
-
6. A RF switch micro-electromechanical wafer level encapsulated device, comprising:
-
a plurality of devices fabricated on a semiconductor substrate wafer, a cap wafer fabricated from a silicon wafer having an array of cavities of predetermined height etched in a pattern corresponding to each of the active devices on said substrate wafer, the walls of said cavities being in the range of 0.05 to 0.2 mm in thickness, and a thin film of glass in the range of 0.5 to 5.0 microns thickness covering the unetched area, a hermetic seal produced by bonding the cap wafer to the semiconductor wafer using said thin film glass as a bonding agent such that each discrete device is sealed in a cavity of predetermined dimensions, one or more conductors of equal length and resistivity formed on the surface of the substrate wafer which provides electrical coupling to each device fabricated on the substrate wafer, an array of holes fabricated in the cap wafer which provides access to each of said conductors from outside the cavity.
-
-
8. A plastic encapsulated micro-electromechanical device comprising;
-
a semiconductor device encapsulated within a cavity in a silicon cap, wherein said cap is bonded to the device substrate by a thin film of glass, one or more conductors on the device substrate electrically coupled to the device and extending outside the encapsulated cavity, and each of which is accessible by a hole in the cap, wire bonds connections between each of said conductors and a lead frame, and said devices are encapsulated in a plastic molding compound.
-
-
9. A micro-electromechanical wafer level encapsulated device, comprising:
-
a plurality of devices fabricated on a semiconductor substrate wafer, a cap wafer fabricated from a silicon wafer, having an array of cavities of predetermined height etched in a pattern corresponding to the active devices on said substrate wafer, and a film of solder adhered to a layer of solder compatible metal covering the unetched area, at least one conductor formed on the surface of the substrate wafer which provides electrical coupling to each device fabricated on the substrate wafer, said conductors further covered by a dielectric film, and a solder compatible metal layer, a hermetic seal produced by bonding the cap wafer to the semiconductor wafer using said solder as a bonding agent such that the device is sealed in a cavity of predetermined dimensions, and an array of holes fabricated in the cap wafer which provides access to each of said conductors from outside the cavity. - View Dependent Claims (10, 11)
-
Specification