Integrated RAM thermal sensor

• US 6,453,218 B1
• Filed: 03/29/1999
• Issued: 09/17/2002
• Est. Priority Date: 03/29/1999
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Vergis, George
• Primary Examiner(s): PATEL, RAMESH B
• Application Number:
  US09/280,913
• Time in Patent Office: 1,268 Days
• Field of Search: 700/12, 700/13, 700/14, 700/15, 700/16, 700/21, 700/299, 700/300, 700/278, 365/211, 365/212, 365/222, 365/149, 365/183, 374/178, 374/173, 374/172, 374/175, 374/100-110
• US Class Current: 700/299
• CPC Class Codes: G05D 23/1917 using digital means
• CPC Class Codes: G05D 23/20 with sensing elements having variation of electric or magnetic properties with change of temperature G05D23/13 takes precedence

Abstract

A method and apparatus for the thermal sensing and regulating of a RAM device using temperature sensing circuitry, embedded directly in the device, is presented. A predetermined voltage is passed through a temperature sensitive diode to create an analog signal. The analog signal is converted into digital temperature data by a A/D converter. The digital temperature data is then transmitted to a controlling host, without interfering with the normal operation of the device, by either transmitting the data in an out-of-band signal or during the clock refresh cycle. The controlling host, upon receipt of the temperature data, checks to see if the temperature level of the device has exceeded a threshold value.

Claims

1. A method for thermal sensing and regulating in a RAM device, the method comprising the steps of:

creating an analog signal by passing a predetermined voltage through a temperature sensitive diode embedded in the RAM device;

converting the analog signal to a digital temperature data; and

transmitting the digital temperature data to a host capable of regulating an access rate of the RAM device.

2. The method of claim 1, further comprising the step of:

storing the digital temperature data in a register.

3. The method of claim 1, further comprising the step of:

generating a clock signal,

wherein the digital temperature data is transmitted on the basis of the clock signal.

4. The method of claim 3, wherein transmission is accomplished during the clock refresh cycle.

5. The method of claim 1, wherein transmission of the digital temperature data is accomplished by an out-of-band signal.

6. The method of claim 1, wherein transmission of the digital temperature data is via a pair of CMOS pins.

7. The method of claim 1, wherein transmission of the digital temperature data is via a plurality of pins, the plurality of pins not being used to transmit a clock refresh signal.

8. The method of claim 1, wherein the host is adaptively configured to regulate the access rate of the RAM device based on the digital temperature data.

9. An apparatus for thermal sensing and regulating in a RAM device, the apparatus comprising:

a temperature sensitive diode, embedded in the RAM device, to generate an analog signal reflecting the temperature of the RAM device;

an A/D converter, embedded in the RAM device and coupled to the temperature sensitive diode, to convert the analog signal to digital temperature data; and

a controller host, coupled to the RAM device, to receive the temperature data and control a rate of access to the RAM device on the basis of the temperature data.

10. The apparatus of claim 9, further comprising:

a control circuit which can retrieve the temperature data and send it to the controller host.

11. The apparatus of claim 9, further comprising a clock having a clock signal coupled to the RAM device, wherein the digital temperature data is generated and transmitted to the controller host based on the clock signal.

12. The apparatus of claim 9, wherein the temperature sensitive diode generates the analog signal based on a predetermined voltage from a power supply external to the RAM device.

13. The apparatus according to claim 9, further comprising:

a register, in which the temperature data can be stored.

14. The apparatus according to claim 9, further comprising:

at least one serial pin on the RAM device through which transmission of the temperature data takes place.

15. The apparatus according to claim 9, further comprising:

a bus connecting the RAM device to the Controller host.

16. The apparatus according to claim 9, wherein the temperature data is sent in an out-of-band signal so as not to interfere with the normal operation of the RAM device.

17. The apparatus according to claim 9, wherein the temperature data is sent during a clock refresh cycle so as not to interfere with the normal operation of the RAM device.

18. The apparatus of claim 9, wherein transmission of the temperature data is via a pair of CMOS pins.

19. The apparatus of claim 9, wherein transmission of the temperature data is via a plurality of pins, the plurality of pins not being used to transmit a clock refresh signal.