Pseudo product code encoding and decoding apparatus and method

• US 6,453,439 B1
• Filed: 02/10/2000
• Issued: 09/17/2002
• Est. Priority Date: 02/12/1999
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Hattori, Masayuki, Yamamoto, Kohei
• Primary Examiner(s): Chung, Phung M.
• Assistant Examiner(s): Chase, Shelly A
• Application Number:
  US09/501,613
• Time in Patent Office: 950 Days
• Field of Search: 714/752, 714/755, 714/763, 714/758
• US Class Current: 714/755
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2906 using block codes H03M13/2957 takes precedence

Abstract

A pseudo product code decoder effects error correction by using parity symbols of a first linear-structure error correction code contained in an input symbol train that constitutes a pseudo product code and by using parity symbols of a second linear-structure error correction code. Second-series information symbols are extracted from the symbol train; and a subtraction code of a pseudo product code codeword is formed of the second-series information symbols, with the first-series information symbol portion and the second linear-structure error correction code portion being changed to zero codes. The pseudo product code codeword is transformed into a product code codeword by subtracting processing with the subtraction code. Decoding processing is performed a plurality of times on the symbol train of the product code codeword, thereby effecting error correction; and first-series information symbols are extracted from the error corrected symbol train.

Claims

1. A pseudo product code decoding apparatus, comprising:

first error correction code decoding means for effecting error correction by using parity symbols of a first linear-structure error correction code contained in a symbol train that constitutes a pseudo product code codeword, said pseudo product code codeword being formed by adding, to an array of first-series information symbols, a second linear-structure error correction code regarding external code, adding thereto second-series information symbols, and adding, to the first-series information symbols with said second linear-structure error correction code and said second-series information symbols added thereto, said first linear-structure error correction code regarding internal code;

second error correction code decoding means for effecting error correction by using parity symbols of said second linear-structure error correction code;

second-series information symbol extracting means for extracting said second-series information symbols from the symbol train constituting said pseudo product code;

subtraction code generating means for generating a subtraction code of a pseudo product code codeword formed of said second-series information symbols extracted by said second-series information symbol extracting means, with the first-series information symbol portion and the second linear-structure error correction code portion being changed to zero codes;

transforming means for subtracting, from said symbol train of said pseudo product code codeword, said subtraction code generated by said subtraction code generating means, thereby transforming said pseudo product code codeword into a product code codeword;

error correction code repetitive decoding means for effecting decoding processings a plurality of times on the symbol train of said product code codeword formed by said transforming means, thereby effecting error correction; and

first-series information symbol extracting means for extracting the first-series information symbols from the symbol train constituting the product code codeword obtained by said error correction code repetitive decoding means.

2. A pseudo product code decoding apparatus according to claim 1, further comprising:

first interleave means for rearranging the symbol train which is output from said first error correction code decoding means and which includes symbols arranged in the sequence of said first linear-structure correction code into the sequence of said second linear-structure error correction code, and for delivering the resultant symbol train to said second error correction code decoding means; and

second interleave means for rearranging the symbol train which is output from said second error correction code decoding means and which includes symbols arranged in the sequence of said second linear-structure error correction code into the sequence of said first linear-structure error correction code, and for delivering the resultant symbol train to said error correction code repetitive decoding means.

3. A pseudo product code decoding apparatus according to claim 1, wherein said second-series information symbol extracting means extracts the second-series information symbols from the symbol train constituting a pseudo product code codeword output from said first error correction code decoding means.

4. A pseudo product code decoding apparatus according to claim 1, wherein said subtraction code generating means includes:

zero code adding means for adding, to said second-series information symbols from said second-series information symbol extracting means, adding the first-series information symbol portion and the second linear-structure error correction code portion such that these portions become zero codes; and

encoding means for encoding the output from said zero code adding means to add the first linear-structure error correction code, thereby forming the subtraction code of pseudo product code codeword.

5. A pseudo product code decoding apparatus according to claim 1, wherein said subtraction code generating means generates the subtraction code with the first linear-structure error correction code added thereto, by encoding said second-series information symbols output from said second-series information symbol extraction means, by treating the first-series information symbol portion and the second linear-structure error correction code portion as being zero codes.

6. A pseudo product code decoding apparatus according to claim 1, wherein said subtraction code generating means generates the subtraction code with the first linear-structure error correction code added thereto, by effecting encoding while treating as being zero codes the first-series information symbol portion and the second linear-structure error correction code portion of the second-series information symbols extracted from the pseudo product code codeword decoded by said first error correction code decoding means.

7. A pseudo product code decoding method, comprising:

a first error correction code decoding step for effecting error correction by using parity symbols of a first linear-structure error correction code contained in a symbol train that constitutes a pseudo product code codeword, said pseudo product code codeword being formed by adding, to an array of first-series information symbols, a second linear-structure error correction;

code regarding external code, adding thereto second-series information symbols, and adding, to the first-series information symbols with said second linear-structure error correction code and said second-series information symbols added thereto, said first linear-structure error correction code regarding internal code;

a second error correction code decoding step for effecting error correction by using parity symbols of said second linear-structure error correction code;

a second-series information symbol extracting step for extracting said second-series information symbols from the symbol train constituting said pseudo product code;

a subtraction code generating step for generating a subtraction code of a pseudo product code codeword formed of said second-series information symbols extracted by said second-series information symbol extracting step, with the first-series information symbol portion and the second linear-structure error correction code portion being changed to zero codes;

a transforming step for subtracting, from said symbol train of said pseudo product code codeword, said subtraction code generated by said subtraction code generating step, thereby transforming said pseudo product code codeword into a product code codeword;

an error correction code repetitive;

decoding step for effecting decoding processings a plurality of times on the symbol train of said product code codeword formed by said transforming step, thereby effecting error correction; and

a first-series information symbol extracting step for extracting the first-series information symbols from the symbol train constituting the product code codeword obtained by said error correction code repetitive decoding step.

8. A pseudo product code decoding method according to claim 7, further comprising:

a first interleave step for rearranging the symbol train which is output from said first error correction code decoding step and which includes symbols arranged in the sequence of said first linear-structure correction code into the sequence of said second linear-structure error correction code;

a second interleave step for rearranging the symbol train which is output from said second error correction code decoding step and which includes symbols arranged in the sequence of said second linear-structure error correction code into the sequence of said first linear-structure error correction code; and

executing the second linear-structure error correction code decoding step on the symbol train rearranged by said first interleave step, while executing said error correction code repetitive decoding processing on said symbol train rearranged by said second interleave step.

9. A pseudo product code decoding method according to claim 7, wherein said second-series information symbol extracting step extracts the second-series information symbols from the symbol train constituting a pseudo product code codeword output from said first error correction code decoding step.

10. A pseudo product code decoding method according to claim 7, wherein said subtraction code generating step includes:

zero code adding step for adding, to said second-series information symbols from said second-series information symbol extracting step, adding the first-series information symbol portion and the second linear-structure error correction code portion such that these portions become zero codes; and

encoding step for encoding the output from said zero code adding step to add the first linear-structure error correction code, thereby forming the subtraction code of pseudo product code codeword.

11. A pseudo product code decoding method according to claim 7, wherein said subtraction code generating step generates the subtraction code with the first linear-structure error correction code added thereto, by encoding said second-series information symbols output from said second-series information symbol extraction step, by treating the first-series information symbol portion and the second linear-structure error correction code portion as being zero codes.

12. A pseudo product code decoding method according to claim 7, wherein said subtraction code generating step generates the subtraction code with the first linear-structure error correction code added thereto, by effecting encoding while treating as being zero codes the first-series information symbol portion and the second linear-structure error correction code portion of the second-series information symbols extracted from the pseudo product code codeword decoded by said first error correction code decoding step.