Method of manufacturing a trench gate power transistor with a thick bottom insulator

• US 6,455,378 B1
• Filed: 10/25/2000
• Issued: 09/24/2002
• Est. Priority Date: 10/26/1999
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd., Hitachi ULSI Systems Company Limited (Hitachi, Ltd.)
• Original Assignee: Hitachi, Ltd., Hitachi ULSI Systems Company Limited (Hitachi, Ltd.)
• Inventors: Oishi, Kentaro, Inagawa, Hiroshi, Machida, Nobuo
• Primary Examiner(s): CHAUDHARI, CHANDRA P
• Application Number:
  US09/695,036
• Time in Patent Office: 699 Days
• Field of Search: 438/138, 438/268, 438/270, 438/424, 438/430, 438/589, 438/981
• US Class Current: 438/270
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4232 with insulated gate
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7808 the other device being a breakdown diode, e.g. Zener diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: Y10S 438/981 Utilizing varying dielectric thickness

Abstract

There are formed a gate insulator 8 and a gate 3 of a power transistor Q having a trench-gate structure. There are then formed a channel region 5 and a source region 6 of the power transistor Q.

Claims

1. A manufacturing method of semiconductor device, comprising the steps of:

(a) forming a trench in a semiconductor substrate;

(b) forming a gate insulator in said trench so that a trench bottom becomes thicker than a trench side face;

(c) forming a gate in said trench after forming said gate insulator;

(d) implanting impurities for forming a channel region in said semiconductor substrate after forming said gate formation step; and

(e) implanting impurities for forming a source region in said semiconductor substrate after forming said gate formation step;

wherein said step (a) further comprises the steps of;

forming a first insulator on a principal plane of said semiconductor substrate;

forming an opening by removing a formation region for said trench from said first insulator; and

forming said trench by removing a semiconductor substrate exposed from said opening by using said first insulator as a mask;

wherein said method further comprises the step of making said first insulator'"'"'s opening larger than said trench after said step (a) and before said step (b); and

wherein said step (b) further comprises the steps of;

forming a second insulator on an inner face of said trench;

forming an oxidation-resistant third insulator on a surface of said second insulator;

leaving said third insulator on a side face of said trench by etching back said third insulator;

selectively forming a thick insulator on a region exposed from said third insulator on said semiconductor substrate by applying oxidation treatment to said semiconductor substrate;

removing said third insulator and then removing said second insulator; and

forming a gate insulator so that a semiconductor substrate'"'"'s principal plane portion exposed from said first insulator'"'"'s opening and said trench bottom become thicker than a trench side face by applying oxidation treatment to said semiconductor substrate after said step of removing said second insulator, and

said step (c) further comprises the steps of;

depositing a conductor film in said trench and on said semiconductor substrate'"'"'s principal plane; and

forming said gate with a T-shaped cross section by etching back said conductor film.

2. The manufacturing method of semiconductor device according to claim 1, comprising the step of depositing an insulator on a surface of said gate insulator by means of chemical vapor growth after said step of forming a gate insulator.

3. A manufacturing method of semiconductor device, comprising the steps of:

(a) forming a trench in a semiconductor substrate;

(b) forming a gate insulator in said trench so that a trench bottom becomes thicker than a trench side face;

(c) forming a gate in said trench after forming said gate insulator;

(d) implanting impurities for forming a channel region in said semiconductor substrate after forming said gate formation step; and

(e) implanting impurities for forming a source region in said semiconductor substrate after forming said gate formation step;

wherein said step (a) further comprises the steps of;

forming a first insulator on a principal plane of said semiconductor substrate;

forming an opening by removing a formation region for said trench from said first insulator; and

forming said trench by removing a semiconductor substrate exposed from said opening by using said first insulator as a mask; and

wherein said step (b) further comprises the steps of;

forming a second insulator on an inner face of said trench;

forming an oxidation-resistant third insulator on a surface of said second insulator;

leaving said third insulator on a side face of said trench by etching back said third insulator;

selectively forming a thick insulator on a region exposed from said third insulator on said semiconductor substrate by applying oxidation treatment to said semiconductor substrate;

removing said third insulator and then removing said second insulator; and

forming a gate insulator so that a semiconductor substrate'"'"'s principal plane portion exposed from said first insulator'"'"'s opening and said trench bottom become thicker than a trench side face by applying oxidation treatment to said semiconductor substrate after said step of removing said second insulator and after making said first insulator'"'"'s opening larger than said trench, and

said step (c) further comprises the steps of;

depositing a conductor film in said trench and on said semiconductor substrate'"'"'s principal plane; and

forming said gate with a T-shaped cross section by etching back said conductor film.

4. The manufacturing method of semiconductor device according to claim 3, further comprising the step of

depositing an insulator on a surface of said gate insulator by means of chemical vapor growth after said step of forming a gate insulator.

5. A manufacturing method of semiconductor device, comprising the steps of:

(a) forming a trench in a semiconductor substrate;

(b) forming a gate insulator in said trench so that a trench bottom becomes thicker than a trench side face;

(c) forming a gate in said trench after forming said gate insulator;

(d) implanting impurities for forming a channel region in said semiconductor substrate after forming said gate formation step; and

(e) implanting impurities for forming a source region in said semiconductor substrate after forming said gate formation step;

wherein said step (b) further comprises the steps of;

forming a second insulator on an inner face of said trench;

forming an oxidation-resistant third insulator on a surface of said second insulator;

leaving said third insulator on a side face of said trench by etching back said third insulator;

selectively forming a thick insulator on a region exposed from a third insulator on said semiconductor substrate by applying oxidation treatment to said semiconductor substrate;

removing said third insulator and then removing said second insulator; and

forming said gate insulator by applying oxidation treatment to said semiconductor substrate after said step of forming a gate insulator.

6. The manufacturing method of semiconductor device according to claim 5, further comprising the step of depositing an insulator on a surface of said gate insulator by means of chemical vapor growth after said step of forming a gate insulator.

7. The manufacturing method of semiconductor device according to claim 5, wherein said step (c) further comprises the steps of:

depositing a conductor film in said trench and on said semiconductor substrate'"'"'s principal plane; and

forming said gate with an I-shaped cross section by etching back said conductor film.

8. The manufacturing method of semiconductor device according to claim 5, wherein said step (c) further comprises the steps of:

depositing a conductor film in said trench and on said semiconductor substrate'"'"'s principal plane, said conductor film having an impurity density higher than an impurity density of said semiconductor substrate;

forming said I-shaped gate by etching back said conductor film;

forming a cap insulator on a top surface of said I-shaped gate by applying oxidation treatment to said semiconductor substrate; and

using said cap insulator as a mask and removing a semiconductor substrate'"'"'s principal plane portion exposed therefrom for a specified depth to protrude said gate'"'"'s top surface from a semiconductor substrate'"'"'s principal plane.

9. The manufacturing method of semiconductor device according to claim 5, wherein said step (c) further comprises the steps of:

depositing a conductor film in said trench and on said semiconductor substrate'"'"'s principal plane, said conductor film having an impurity density higher than an impurity density of said semiconductor substrate;

forming said I-shaped gate by etching back said conductor film;

forming a cap insulator on a top surface of said I-shaped gate by applying oxidation treatment to said semiconductor substrate; and

forming a mask pattern to cover said cap insulator on said semiconductor substrate'"'"'s principal plane, using said mask pattern as a mask, and removing a semiconductor substrate'"'"'s principal plane portion exposed therefrom for a specified depth to protrude said gate'"'"'s top surface from a semiconductor substrate'"'"'s principal plane.

10. A manufacturing method of semiconductor device, comprising the steps of:

(a) forming a trench in a semiconductor substrate;

(b) forming a gate insulator in said trench so that a trench bottom becomes thicker than a trench side face;

(c) forming a gate in said trench after forming said gate insulator;

(d) implanting impurities for forming a channel region in said semiconductor substrate after forming said gate formation step; and

(e) implanting impurities for forming a source region in said semiconductor substrate after forming said gate formation step;

wherein said method further comprises the steps of;

forming a field-effect transistor having said gate on said semiconductor substrate and then depositing an inter-layer insulator on said semiconductor substrate'"'"'s principal plane;

boring a first hole for exposing said channel region in said inter-layer insulator and semiconductor substrate;

implanting same conductive impurities as those constituting said channel region thereinto through said first hole so that impurities to be implanted become relatively denser than those constituting said channel region;

letting said inter-layer insulator involve said hole according to a plane view and forming a larger second hole than said hole so as to expose a source region on said semiconductor substrate'"'"'s principal plane; and

depositing a conductor film so as to be embedded in said first and second holes and forming wiring by patterning.