Test, reset and communications operations in an ARC fault circuit interrupter with optional memory and/or backup power

• US 6,456,471 B1
• Filed: 12/17/1999
• Issued: 09/24/2002
• Est. Priority Date: 02/19/1998
• Status: Expired due to Term

• Current Assignee: Square D Company (Schneider Electric SE)
• Original Assignee: Square D Company (Schneider Electric SE)
• Inventors: Scott, Gary W., Dvorak, Robert F., Wong, Kon B., Haun, Andy A., Grattan, Brian G.
• Primary Examiner(s): Leja, Ronald W.
• Application Number:
  US09/466,362
• Time in Patent Office: 1,012 Days
• Field of Search: 361/42-50, 324/520, 324/522, 324/536, 324/613, 702/58, 702/64, 702/66, 702/69
• US Class Current: 361/42
• CPC Class Codes: H01H 2083/201 the other abnormal electrical condition being an arc fault
• CPC Class Codes: H01H 2300/03 Application domotique, e.g. for house automation, bus connected switches, sensors, loads or intelligent wiring
• CPC Class Codes: H01H 71/125 characterised by sensing elements, e.g. current transformers for differential protection H01H83/144
• CPC Class Codes: H01H 71/128 Manual release or trip mechanisms, e.g. for test purposes two similar push buttons for closing or resetting and opening or tripping H01H71/58; test switches for earth fault circuit breakers H01H83/04
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 1/06 Arrangements for supplying operative power power supply arrangements in general G05F, H02M
• CPC Class Codes: H02H 3/04 with warning or supervision in addition to disconnection, e.g. for indicating that protective apparatus has functioned watching of pilot wires H02H1/0084; protection of protective arrangements H02H7/008; indication of the state of electronic switches H03K17/18
• CPC Class Codes: H02H 3/105 responsive to excess current and fault current to earth
• CPC Class Codes: H02H 3/44 responsive to the rate of change of electrical quantities
• CPC Class Codes: Y02B 70/30 Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
• CPC Class Codes: Y02B 90/20 Smart grids as enabling technology in buildings sector smart grids supporting the management or operation of end-user stationary applications in general, or like technologies with no associated climate change mitigation effect Y04S20/00
• CPC Class Codes: Y04S 20/14 Protecting elements, switches, relays or circuit breakers
• CPC Class Codes: Y04S 20/20 End-user application control systems

Abstract

An arc fault circuit interrupter system for use with an electrical circuit includes an arcing fault detector which monitors the electrical circuit and a controller which generates a trip signal in response to the detection of arcing faults. The controller may also generate one or more communication signals corresponding to information relating to the operation of the arcing fault circuit interrupter. The system may also include one or more of the following: a communication port which communicates to a user the information relating to operation of the arc fault circuit interrupter in response to the communication signals; a memory for retaining predetermined information related to the condition and operation of the arcing fault circuit interrupter, with or without a backup memory; and a combined self-test/reset switch.

Claims

1. An arc fault circuit interrupter system for use with an electrical circuit, comprising:

an arc fault circuit interrupter;

an arcing fault detector which monitors said electrical circuit and a controller which generates a trip signal for the arc fault circuit interrupter in response to the detection of arcing faults;

said controller also generating one or more communication signals corresponding to information relating to the operation of the arc fault circuit interrupter;

a communication port which communicates to a user said information relating to operation of the arc fault circuit interrupter in response to said communication signals;

wherein said arcing fault detector includes a sensor which detects a current in said electrical circuit and develops a corresponding sensor signal, a circuit which determines the presence of broadband noise in said sensor signal and produces a corresponding output signal, and wherein said controller processes said sensor signal and said output signal in a predetermined fashion to determine whether an arcing fault is present in said electrical circuit, and

wherein the information relating to operation includes information corresponding to a standby condition, a tripped condition, at least one of a self-test passed condition and a self-test failed condition, the time elapsed since the last trip, at least one of the present current level, the present voltage level and the power consumption, and the reason for tripping.

2. The system of claim 1 wherein said communication port comprises a radio frequency device.

3. A system of claim 1 wherein said communication port comprises an infrared radiating device.

4. The system of claim 1 wherein said communication port comprises a port configured for communicating said information via said electrical circuit utilizing a predetermined communication protocol.

5. The system of claim 1 wherein said communication port comprises a light emitting device.

6. The system of claim 5 wherein said controller is adapted to cause said light emitting device to emit light in such a fashion that the light is visually perceived by a human observer as being steadily on or flashing on and off.

7. The system of claim 5 wherein said light emitting device comprises a bi-color light emitting diode.

8. The system of claim 7 wherein said controller is adapted to cause said light emitting diode to emit light in such a fashion that the light is visually perceived by a human observer as being steadily on or flashing on and off.

9. The system of claim 5 wherein said communication signal comprises information in a selected data format which causes said light emitting device to pulsate at a human imperceptible rate.

10. The system of claim 1 and further including an operator control unit, and wherein said communication port is adapted for bi-directional exchange of information with said operator control unit.

11. The system of claim 1 and further comprising a reset switch and a self-test activating switch, and a single user-accessible control element adapted to selectively activate one or both of said reset switch and said self-test switch.

12. The system of claim 11 wherein said communication port comprises a light-emitting device, and wherein said user accessible control element includes a translucent portion arranged for permitting transmission of a light from said light emitting device therethrough.

13. The system of claim 1 and further including a memory for retaining predetermined information related to the operation of the arc fault circuit interrupter, said memory being operatively coupled with said controller.

14. The system of claim 13 wherein said memory comprises an on board controller memory.

15. The system of claim 13 wherein said memory is outboard and operatively coupled with said controller.

16. The system of claim 15 wherein said memory comprises a flash memory.

17. The system of claim 13 wherein said controller is adapted to store in said memory predetermined information regarding previous loads and previous tripping events, and to adjust a tripping algorithm which controls tripping, in accordance with the contents of said memory regarding previous loads and previous tripping events.

18. The system of claim 13 wherein said controller is adapted to control an exchange of information between said memory and said communication port.

19. The system of claim 13 and further including a backup power source for said memory.

20. The system of claim 13 and further including a backup power source for said controller.

21. The system of claim 13 and further including a backup power source for said controller and said memory.

22. An arc fault circuit interrupter system for use with an electrical circuit, comprising:

an arc fault circuit interrupter;

an arcing fault detector which monitors said electrical circuit and a controller which generates a trip signal for the arc fault circuit interrupter in response to the detection of arcing faults;

a memory for retaining predetermined information related to the condition and operation of the arc fault circuit interrupter, said memory being operatively coupled with said controller;

wherein said arcing fault detector includes a sensor which detects a current in said electrical circuit and develops a corresponding sensor signal, a circuit which determines the presence of broadband noise in said sensor signal and produces a corresponding output signal, and wherein said controller processes said sensor signal and said output signal in a predetermined fashion to determine whether an arcing fault is present in said electrical circuit; and

wherein the information relating to operation includes information corresponding to a standby condition, a tripped condition, at least one of a self-test passed condition and a self-test failed condition, the time elapsed since the last trip, at least one of the present current level, the present voltage level and the power consumption, and the reason for tripping.

23. The system of claim 22 wherein said controller also generates one or more communication signals corresponding to information relating to the operation of the arc fault circuit interrupter, further including a communication port which communicates to a user said information relating to operation of the arc fault circuit interrupter in response to said communication signals.

24. The system of claim 23 herein said controller is adapted to control the exchange of information between said memory and said communication port.

25. The system of claim 22 wherein said memory comprises an on-board controller memory.

26. The system of claim 22 wherein said memory is outboard of, and operatively coupled with, said controller.

27. The system of claim 26 wherein said memory comprises a flash memory.

28. The system of claim 22 wherein said controller is adapted to store in said memory predetermined information regarding previous loads and previous tripping events, and to adjust a tripping algorithm which controls tripping, in accordance with the contents of said memory regarding previous loads and previous tripping events.

29. The system of claim 22 and further including a backup power source for said memory.

30. The system of claim 22 and further including a backup power source for said controller.

31. The system of claim 22 and further including a backup power source for said controller and said memory.

32. A method of arc fault circuit interruption for use with an electrical circuit, comprising:

monitoring said electrical circuit for arcing faults and generating a trip signal in

response to the detection of arcing faults;

generating one or more communication signals corresponding to information relating to the operation of apparatus for carrying out the arcing fault circuit interruption;

communicating to a user via a communications port said information relating to operation of said apparatus in response to said communication signals;

wherein said monitoring includes detecting a current in said electrical circuit and developing a corresponding sensor signal, determining the presence of broadband noise in said sensor signal and producing a corresponding output signal, and processing said sensor signal and said output signal in a predetermined fashion to determine whether an arcing fault is present in said electrical circuit; and

wherein the information relating to operation includes information corresponding to a standby condition, a tripped condition, at least one of a self-test passed condition and a self-test failed condition, the time elapsed since the last trip, at least one of the present current level, the present voltage level and the power consumption, and the reason for tripping.

33. The method of claim 32 wherein said communicating uses radio frequency signals.

34. The method of claim 32 wherein said communicating uses infrared signals.

35. The method of claim 32 wherein said communicating uses a predetermined communication protocol.

36. The method of claim 32 wherein said communicating uses light signals.

37. The method of claim 36 wherein said communicating comprises emitting light signals which pulsate at a human imperceptible rate.

38. The method of claim 32, said communicating including bi-directional exchange of information with an operator control unit.

39. The method of claim 32 and further including a user activating a single user-accessible control element to selectively activate one or both of a reset switch and a self-test switch.

40. The method of claim 32 and further including retaining in a memory predetermined information related to the condition and operation of the apparatus for carrying out arcing fault circuit interruption.

41. The method of claim 40 and further including providing backu power for said memory.

42. The method of claim 32 including storing in a memory predetermined information regarding previous loads and previous tripping events, and adjusting a tripping algorithm which controls tripping in accordance with the contents of said memory regarding previous loads and previous tripping events.

43. A method of arc fault circuit interruption for use with an electrical circuit, comprising:

monitoring said electrical circuit and generating a trip signal in response to the detection of arcing faults;

retaining in a memory predetermined information related to the condition and operation of apparatus for carrying out the arcing fault circuit interruption,

wherein said monitoring includes detecting a current in said electrical circuit and developing a corresponding sensor signal, determining the presence of broadband noise in said sensor signal and producing a corresponding output signal, and processing said sensor signal and said output signal in a predetermined fashion to determine whether an arcing fault is present in said electrical circuit; and

wherein the information relating to operation includes information corresponding to a standby condition, a tripped condition, at least one of a self-test passed condition and a self-test failed condition, the time elapsed since the last trip, at least one of the present current level, the present voltage level and the power consumption, and the reason for tripping.

44. The method of claim 43 and further comprising a user selectively activating a single user-accessible control element adapted to activate one or both of a reset switch and a self-test switch.

45. The method of claim 43 wherein said retaining includes storing in said memory predetermined information regarding previous loads and previous tripping events, and adjusting a tripping algorithm which controls tripping, in accordance with the contents of said memory regarding previous loads and previous tripping events.