Automatic frequency control communication system
First Claim
1. An automatic frequency control communication system comprising:
- a transmitter which inputs transmission data, generates delayed transmission data having a time delay, multiplexes the delayed transmission data with the transmission data for generating multiplexed data, modulates the multiplexed data using Phase Shift Keying (PSK) modulation for generating a transmission signal, and transmits the transmission signal, and a receiver which receives the transmission signal transmitted by the transmitter as a received signal, detects the delayed transmission data and the transmission data included in the received signal, compensates for a phase shift of the received signal based on the delayed transmission data and the transmission data, and demodulates the received signal based on the delayed transmission data and the transmission data.
1 Assignment
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Accused Products
Abstract
In a communication system using the time diversity transmission scheme, the communication system provided with the stable automatic frequency control circuit with the wide frequency pull-in range and under low CN ratio transmission is achieved by removing the modulation phase from the received data through the application of the data correlation of the time diversity. The frequency offset in the received signal is compensated as the phase rotator rotates the phase of the received signal, the phase converter converts the phase rotator output into a phase, the serial-to-parallel converter converts the phase converter outputs into serial-to-parallel sequence, the delay units gives a delay to the serial-to-parallel converter output, the phase adder adds the serial-to-parallel converter output to the delay unit output, the multiplier multiplies the phase adder output by a certain value, the integrator integrates the multiplier output, another integrator integrates the integrator output, and the phase rotator controls the phase of the received signal based on the other integrator output.
47 Citations
47 Claims
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1. An automatic frequency control communication system comprising:
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a transmitter which inputs transmission data, generates delayed transmission data having a time delay, multiplexes the delayed transmission data with the transmission data for generating multiplexed data, modulates the multiplexed data using Phase Shift Keying (PSK) modulation for generating a transmission signal, and transmits the transmission signal, and a receiver which receives the transmission signal transmitted by the transmitter as a received signal, detects the delayed transmission data and the transmission data included in the received signal, compensates for a phase shift of the received signal based on the delayed transmission data and the transmission data, and demodulates the received signal based on the delayed transmission data and the transmission data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
the transmitter further includes: a. a transmission delay unit for inputting the transmission data, adding the time delay, and outputting the delayed transmission data;
b. a parallel-to-serial converter for converting the transmission data and the delayed transmission data from parallel to serial data;
c. a PSK modulation unit for PSK modulating the parallel-to-serial converted data;
d. a frequency converter for converting a frequency of the PSK modulated data; and
e. a transmission unit for transmitting the frequency-converted data; and
wherein the receiver further includes;
a. an oscillator for oscillating a radio frequency;
b. a mixer for inputting the received signal and mixing the input received signal with an output from the oscillator to convert the received signal into an IF signal;
c. an IF circuit for converting the output-from the mixer into a baseband signal;
d. an AFC circuit for eliminating a frequency offset from the output from the IF circuit;
e. a detector circuit for detecting the output from the AFC circuit;
f. a serial-to-parallel converter for converting the output from the detector circuit into received data corresponding to the transmission data of the transmitter and into a first delayed received data corresponding to the delayed transmission data of the transmitter;
g. a received delay unit for adding the time delay to the received data and outputting a second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data; and
i. a discriminator for discriminating a phase of the output from the combination circuit and outputting a demodulated data.
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3. The automatic frequency control communication system of claim 1, wherein
the transmitter further includes: -
a. a transmission delay unit for inputting the transmission data, adding the time delay to the input transmission data and outputting the delayed transmission data;
b. a parallel-to-serial converter for converting the transmission data and the delayed transmission data from parallel to serial data;
c. a PSK modulation unit for PSK modulating the parallel-to-serial converted data;
d. a frequency converter for converting a frequency of the PSK modulated data; and
e. a transmission unit for transmitting the frequency-converted data; and
wherein the receiver further includes;
a. an oscillator for oscillating a radio frequency;
b. a mixer for inputting the received signal and mixing the input received signal with the output from the oscillator to convert the received signal into a baseband signal;
c. a baseband filter for filtering the mixer output;
d. an AFC circuit for feeding a frequency control signal back to the oscillator to eliminate a frequency offset from the output from the baseband filter;
e. a detector circuit for detecting the output from the baseband filter;
f. a serial-to-parallel converter for converting the output from the detector circuit into a received data corresponding to the transmission data of the transmitter and to a first delayed received data corresponding to the delayed transmission data of the transmitter from serial to parallel data;
g. a received delay unit for adding the time delay to the received data and outputting a second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data; and
i. a discriminator for discriminating the phase of the combination circuit and outputting a demodulated data.
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4. The automatic frequency control communication system of claim 1, wherein
the transmitter further includes: -
a. a convolutional coder for inputting the transmission data, and convolutionally coding the input transmission data;
b. a transmission delay unit for adding the time delay to the convolutionally coded transmission data, and outputting said delayed transmission data;
c. a parallel-to-serial converter for converting the convolutionally coded transmission data and the convolutionally coded delayed transmission data into parallel to serial data;
d. a PSK modulation unit for PSK modulating the parallel-to-serial converted data;
e. a frequency converter for converting the frequency of the PSK modulated data; and
f. a transmission unit for transmitting the frequency converted data; and
wherein the receiver further includes;
a. an oscillator for oscillating a radio frequency;
b. a mixer for inputting the received signal, and mixing the received signal with the output from the oscillator to convert the received signal into an IF signal;
c. an IF circuit for converting the mixer output into a baseband signal;
d. an AFC circuit for eliminating a frequency offset from the IF circuit;
e. a detector circuit for detecting the output from the AFC circuit;
f. a serial-to-parallel converter for converting the output from the detector circuit into received data corresponding to the transmission data of the transmitter and first delayed received data corresponding to the delayed transmission data of the transmitter from serial to parallel data;
g. a receive delay unit for adding the time delay to the received data, and outputting second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data; and
i. a maximum likelihood decoder for maximum likelihood decoding the output from the combination circuit.
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5. The automatic frequency control communication system of claim 1, wherein the receiver includes:
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a mixer circuit for mixing the received signal with a radio frequency signal to obtain an IF signal;
an IF circuit for converting the IF signal into a baseband signal;
and an AFC circuit for eliminating a frequency offset from the IF circuit, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and eliminates the frequency offset by feeding a frequency error signal back to the IF circuit, and wherein the detector circuit detects the output from the IF circuit.
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6. The automatic frequency control communication system of claim 2, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and eliminates the frequency offset by feeding a frequency error signal back to the oscillator, and wherein the detector circuit detects the output from the IF circuit.
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7. The automatic frequency control communication system of claim 1, wherein
the transmitter further includes: -
a. a convolutional coder for inputting the transmission data and convolutionally coding the transmission data;
b. a transmission delay unit for adding the time delay to the convolutionally coded transmission data, and outputting convolutionally encoded delayed transmission data;
c. a parallel-to-serial converter for converting the convolutionally coded transmission data and the convolutionally encoded delayed transmission data from parallel into serial data;
d. a PSK modulation unit for PSK modulating the parallel to serial converted data;
e. a frequency converter for converting the frequency of the PSK modulated data; and
f. a transmission unit for transmitting the frequency-converted data; and
wherein the receiver further includes;
a. an oscillator for oscillating a radio frequency;
b. a mixer for inputting the received signal, and mixing the input received signal with the output from the oscillator to convert the received signal into a baseband signal;
c. a baseband filter for filtering the output from the mixer;
d. an AFC circuit for outputting a frequency control signal out of the output from the baseband filter;
e. a detector circuit for detecting the output from the baseband filter;
f. a serial-to-parallel converter for converting the output from the detector circuit into received data corresponding to the transmission data of the transmitter and first delayed received data corresponding to the delayed transmission data of the transmitter from serial into parallel data;
g. a received delay unit for adding to the received data the time delay and outputting second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data; and
i. a maximum likelihood decoder for decoding the output from the combination circuit in the maximum likelihood.
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8. The automatic frequency control communication system of claim 4, wherein the transmitter is equipped with a spread circuit for spreading the spectrum of the PSK modulated transmission data, and wherein the frequency converter converts the frequency of the spread transmission data into a spectrum of the spread circuit;
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wherein the receiver is equipped with an inverse spread circuit for inversely spreading the spectrum of the output from the AFC circuit, and the detector circuit detects the output from the inverse spread circuit.
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9. The automatic frequency control communication system of claim 4, wherein the transmitter is equipped with a spread circuit for spreading the spectrum of the transmission data converted from parallel to serial, and the PSK modulation unit PSK modulates the transmission data whose spectrum has been spread by the spread circuit, wherein the receiver is equipped with an inverse spread circuit for spreading a spectrum of the output from the detector circuit inversely, and wherein the serial-to-parallel converter converts the output from the inverse spread circuit from serial to parallel data.
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10. The automatic frequency control communication system of claim 2, wherein the combination circuit of the receiver performs an equal gain combination.
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11. The automatic frequency control communication system of claim 2, wherein the combination circuit of the receiver performs a maximum ratio combination.
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12. The automatic frequency control communication system of claim 4, wherein
a. the convolutional coder inputs the transmission data, and convolutionally codes the input transmission data in order to output the transmission data made up of a plurality of data sequences; -
b. the transmission delay unit adds the time delay to the transmission data corresponding to the plurality of data sequences in order to output the delayed transmission data; and
c. the parallel-to-serial converter converts the transmission data corresponding to the plurality of data sequences and the delayed transmission data from parallel into serial data;
and wherein a. the serial-to-parallel converter converts the output from the detector circuit into the received data corresponding to the transmission data corresponding to the plurality of data sequences and the first delayed received data corresponding to the delayed transmission data corresponding to the plurality of data sequences from serial to parallel data;
b. the received delay unit outputs the second delayed received data to which the time delay is added to the received data;
c. the combination circuit combines the first delayed received data and the second delayed received data; and
d. the maximum likelihood decoder decodes the output from the combination circuit corresponding to the data sequences in the maximum likelihood in order to output decoded data.
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13. The automatic frequency control communication system of claim 4, wherein
a. the convolutional coder inputs the transmission data, and convolutionally codes the input transmission data in order to output convolutionally coded data made up of a plurality of data sequences; -
b. the transmission delay unit gives the convolutionally coded data corresponding to each of the plurality of data sequences a first transmission delay time corresponding to a first set of data sequences to output in a first set of transmission data, and gives the convolutionally coded data corresponding to each of the plurality of data sequences a second transmission delay time corresponding to a second set of data sequences to output in a second set of transmission data; and
c. the parallel-to-serial converter converts the first set of transmission data and the second set of transmission data from parallel into serial data; and
whereina. the serial-to-parallel converter converts the output from the detector circuit into the first received data corresponding to the first set of transmission data corresponding to the first set of data sequences and the second received data corresponding to the second set of transmission data corresponding to the second set of data sequences;
b. the received delay unit adds to the first received data corresponding to the plurality of data sequences a first received delay time corresponding to a first set of data sequences in order to output a first delayed signal, and adds to the second received data corresponding to a second set of data sequences a second received delay time in order to output the second delayed signal;
c. the combination circuit combines the first delayed signal and the second delayed signal; and
d. the maximum likelihood decoder decodes the output from the combination circuit corresponding to the plurality of data sequences in maximum likelihood in order to output the decoded data; and
wherein a sum of the first transmission delay time and the first received delay time equals each of the first set of data sequences, the second set of data sequences and the sum of the second transmission delay time and the second received delay time.
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14. The automatic frequency control communication system of claim 3, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and reduces the frequency offset by feeding a frequency error signal back to the IF circuit, and wherein the detector circuit detects the output from the IF circuit.
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15. The automatic frequency control communication system of claim 3, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and reduces the frequency offset by feeding a frequency error signal back to the oscillator, and wherein the detector circuit detects the output from the IF circuit.
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16. The automatic frequency control communication system of claim 4, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and reduces the frequency offset by feeding a frequency error signal back to the IF circuits and wherein the detector circuit detects the output from the IF circuit.
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17. The automatic frequency control communication system of claim 4, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and reduces the frequency offset by feeding a frequency error signal back to the oscillator, and wherein the detector circuit detects the output from the IF circuit.
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18. The automatic frequency control communication system of claim 7, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and reduces the frequency offset by feeding a frequency error signal back to the IF circuit, and wherein the detector circuit detects the output from the IF circuit.
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19. The automatic frequency control communication system of claim 7, wherein the AFC circuit obtains a frequency error without removing a modulation phase in the output from the IF circuit, and reduces the frequency offset by feeding a frequency error signal back to the oscillator, and wherein the detector circuit detects the output from the IF circuit.
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20. A communication method comprising steps of:
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inputting a transmission data;
generating delayed transmission data having a time delay;
multiplexing the delayed transmission data and the transmission data to generate a multiplexed data;
modulating the multiplexed data using the Phase Shift Keying (PSK) modulation to generate a transmission signal;
transmitting the transmission signal;
receiving the transmission signal transmitted by the transmitter as a received signal;
detecting the delayed transmission data and the transmission data included in the received signal;
compensating for a phase shift of the received signal based on the delayed transmission data and the transmission data; and
demodulating data of the received signal based on the delayed transmission data and the transmission data.
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21. A method for automatic frequency control in a transmitter comprising:
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generating delayed transmission data having a time delay associated therewith relative to non-delayed transmission data;
multiplexing the delayed transmission data with the non-delayed transmission data to generate multiplexed data;
modulating the multiplexed data using Phase Shift Keying (PSK) modulation to generate a transmission signal; and
transmitting the transmission signal, wherein the delayed transmission data is used to compensate for a phase shift in the transmission signal. - View Dependent Claims (22)
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23. A method for automatic frequency control in a receiver comprising:
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separating delayed transmission data from non-delayed transmission data in a received signal;
compensating for a phase shift associated with the received signal based on the separated delayed transmission data and non-delayed transmission data; and
demodulating the received signal based on the delayed transmission data and the non-delayed transmission data. - View Dependent Claims (24, 25)
converting the received signal into a plurality of data sequences;
adding a delay to at least some of the data sequences to generate delayed and non-delayed data sequences;
combining the delayed and non-delayed data sequences to form combined data sequences; and
performing a maximum likelihood decoding on the combined data sequences.
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25. The method according to claim 23 wherein the step of compensating further includes the steps of:
removing a frequency offset associated with the received signal; and
inverse-spreading the received signal once the frequency offset has been removed.
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26. A transmitter for providing automatic frequency control in a communication system comprising:
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a transmit output section; and
a processing section coupled to the transmit output section, the transmitter configured to;
generate delayed transmission data having a time delay relative to transmission data, multiplex the delayed transmission data with the transmission data to generating multiplexed data, modulate the multiplexed data using Phase Shift Keying (PSK) modulation for generating a transmission signal, and transmit the transmission signal, wherein the delayed transmission data is used to compensate for a phase shift in the transmission signal. - View Dependent Claims (27, 28, 29, 30, 31)
a. a transmission delay unit adding the time delay to the transmission data to generate the delayed transmission data;
b. a parallel-to-serial converter for converting the transmission data and the delayed transmission data from parallel to serial data;
c. a PSK modulation unit for PSK. modulating the parallel-to-serial converted data;
d. a frequency converter for converting a frequency of the PSK modulated data; and
e. a transmission unit for transmitting the frequency-converted data.
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28. The transmitter of claim 26, wherein the processing section further comprises:
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a. a convolutional coder for convolutionally coding the transmission data;
b. a transmission delay unit for adding the time delay to the convolutionally coded transmission data, and outputting a convolutionally coded delayed transmission data;
c. a parallel-to-serial converter for converting the convolutionally coded transmission data and the convolutionally coded delayed transmission data into serial data;
d. a PSK modulation unit for PSK modulating the parallel-to-serial converted data; and
e. a frequency converter for converting the frequency of the PSK modulated data;
wherein the transmit output section transmits the frequency converted data.
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29. The transmitter of claim 28, wherein the processing section further comprises a spread circuit for spreading the spectrum of the PSK modulated transmission data;
- wherein the frequency converter converts the frequency of the spread transmission data into a spectrum of the spread circuit.
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30. The transmitter of claim 28, wherein the processing section further comprises a spread circuit for spreading the spectrum of the parallel to serial converted transmission data, and wherein the PSK modulation unit PSK modulates the spread spectrum transmission data.
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31. The transmitter of claim 28, wherein:
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a. the convolutional coder is further configured to convolutionally code the transmission data to output a plurality of data sequences;
b. the transmission delay unit is further configured to adds the time delay to the plurality of data sequences in order to output the delayed transmission data; and
c. the parallel-to-serial converter converts the plurality of data sequences and the delayed transmission data from parallel into serial.
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32. A transmitter for providing automatic frequency control in a communication system comprising:
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a transmit output section; and
a processing section coupled to the transmit output section, the transmitter configured to;
generate delayed transmission data having a time delay relative to transmission data, multiplex the delayed transmission data with the transmission data to generating multiplexed data, modulate the multiplexed data using Phase Shift Keying (PSK) modulation for generating a transmission signal, and transmit the transmission signal, wherein the processing section further comprises;
a. a convolutional coder for convolutionally coding the transmission data;
b. a transmission delay unit for adding the time delay to the convolutionally coded transmission data, and outputting a convolutionally coded delayed transmission data;
c. a parallel-to-serial converter for converting the convolutionally coded transmission data and the convolutionally coded delayed transmission data into serial data;
d. a PSK modulation unit for PSK modulating the parallel-to-serial converted data; and
e. a frequency converter for converting the frequency of the PSK modulated data, wherein the transmit output section transmits the frequency converted data, wherein the transmission delay unit is further configured to give the convolutionally coded data corresponding to each of the plurality of data sequences a first transmission delay time corresponding to a first set of data sequences to output in a first set of transmission data, and gives the convolutionally coded data corresponding to each of the plurality of data sequences a second transmission delay time corresponding to a second set of data sequences to output in a second set of transmission data; and
the parallel-to-serial converter is further configured to convert the first set of transmission data and the second set of transmission data from parallel into serial.
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33. A receiver for providing automatic frequency control in a communication system comprising:
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a receive input section; and
a receive processing section coupled to the receive input section, the receiver configured to;
separate transmission data from delayed transmission data included in a received signal, compensate for a phase shift of the received signal based on the transmission data and the delayed transmission data, and demodulate the received signal based on the delayed transmission data and the transmission data. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41, 42, 43)
a. an oscillator for generating a radio frequency;
b. a mixer for mixing the received signal with the radio frequency to generate an IF signal;
c. an IF circuit for converting the IF signal into a baseband signal;
d. an AFC circuit for removing a frequency offset from the baseband signal;
e. a detector circuit for detecting the baseband signal with removed frequency offset;
f. a serial-to-parallel converter for converting the baseband signal with removed frequency offset into received data corresponding to the transmission data and into a first delayed received data corresponding to the delayed transmission data;
g. a received delay unit for adding a time delay to the received data and outputting a second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data to generate combined data; and
i. a discriminator for discriminating a phase of the combined data and outputting demodulated data.
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35. The receiver of claim 33, wherein the receive processing section further includes:
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a. an oscillator for generating a radio frequency;
b. a mixer for mixing the received signal with the radio frequency to generate a baseband signal;
c. a baseband filter for filtering the baseband signal;
d. an AFC circuit configured to provide a frequency control signal to the oscillator such that the radio frequency is generated which removes a frequency offset from the output of baseband filter;
e. a detector circuit for detecting the output from the baseband filter;
f. a serial-to-parallel converter for converting the output from the detector circuit into a received data corresponding to the transmission data and into a first delayed received data corresponding to the delayed transmission data from serial to parallel data;
g. a received delay unit for adding a time delay to the received data and outputting a second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data to generate combined data; and
i. a discriminator for discriminating a phase of the combined data and outputting demodulated data.
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36. The receiver of claim 33, wherein the receive processing section further comprises:
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a. an oscillator for generating a radio frequency;
b. a mixer for mixing the received signal with the radio frequency to generate an IF signal;
c. an IF circuit for converting the IF signal into a baseband signal;
d. an AFC circuit for removing a frequency offset from baseband signal;
e. a detector circuit for detecting the output from the AFC circuit;
f. a serial-to-parallel converter for converting the output from the detector circuit into received data corresponding to the transmission data and a first delayed received data corresponding to the delayed transmission data from serial to parallel data;
g. a receive delay unit for adding a time delay to the received data, and outputting a second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data to generate combined data; and
i. a maximum likelihood decoder for maximum likelihood decoding the combined data.
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37. The receiver of claim 34, wherein the AFC circuit is further configured to:
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obtain a frequency error without removing a modulation phase from the baseband signal, and eliminate the frequency offset by feeding a frequency error signal back to the IF circuit.
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38. The receiver claim 34, wherein the AFC circuit is further configured to:
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obtain a frequency error without removing a modulation phase from the baseband circuit, and eliminate the frequency offset by feeding a frequency error signal back to the oscillator.
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39. The receiver of claim 33, wherein the receive processing section further comprises:
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a. an oscillator for generating a radio frequency;
b. a mixer for mixing the received signal with the radio frequency to generate a baseband signal;
c. a baseband filter for filtering the baseband signal;
d. an AFC circuit for outputting a frequency control signal based on the filtered baseband signal;
e. a detector circuit for detecting the output from the baseband filter;
f. a serial-to-parallel converter for converting the output from the detector circuit into a received data corresponding to the transmission data and a first delayed received data corresponding to the delayed transmission data from serial into parallel data;
g. a received delay unit for adding to the received data a time delay and outputting a second delayed received data;
h. a combination circuit for combining the first delayed received data with the second delayed received data to generate combined data; and
i. a maximum likelihood decoder for maximum likelihood decoding the combined data.
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40. The automatic frequency control communication system of claim 36, wherein the receiver processing section further comprises an inverse spread circuit for inversely spreading the spectrum of the baseband signal output from the AFC circuit.
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41. The receiver of claim 36, wherein the receive processing section further comprises an inverse spread circuit for inversely spreading a spectrum of the output from the detector circuit.
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42. The receiver of claim 36, wherein:
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a. the serial-to-parallel converter is further configured to convert the output from the detector circuit into the received data corresponding to the transmission data and further corresponding to a first plurality of data sequences and the first delayed received data corresponding to the delayed transmission data and further corresponding to a second plurality of data sequences from serial to parallel data; and
d. the maximum likelihood decoder is further configured to maximum likelihood decode the output from the combination circuit corresponding to the first and second data sequences.
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43. The receiver of claim 36, wherein:
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a. the serial-to-parallel converter is further configured to convert the output from the detector circuit into the first received data corresponding to a first set of transmission data corresponding to a first set of data sequences and the second received data corresponding to a second set of transmission data corresponding to a second set of data sequences;
b. the received delay unit is further configured to add to the first god received data corresponding a first received delay time corresponding to a first set of data sequences to generate a first delayed signal, and adds to the second received data a second received delay time corresponding to a second set of data sequences to generate a second delayed signal;
c. the combination circuit is further configured to combine the first delayed signal and the second delayed signal; and
d. the maximum likelihood decoder is further configured to maximum likelihood decode the output from the combination circuit corresponding to the plurality of data sequences to generate the decoded data; and
wherein a sum of a first transmission delay time and the first received delay time equals the sum of each time delay associated with the first set of data sequences, the second set of data sequences, and the sum of a second transmission delay time and the second received delay time.
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44. A transmitter for providing automatic frequency control in a communication system, comprising:
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a transmit output section; and
a processing section coupled to the transmit output section, the transmitter configured to;
input transmission data, generate delayed transmission data having a time delay associated therewith relative to the input transmission data, multiplex the delayed transmission data with the input transmission data to generate multiplexed data, modulate the multiplexed data using Phase Shift Keying (PSK) modulation for generating a transmission signal, and transmit the transmission signal, wherein the processing section further comprises;
a. a convolutional coder for convolutionally coding the input transmission data;
b. a transmission delay unit for adding the time delay to the convolutionally coded input transmission data, and outputting a convolutionally coded delayed transmission data;
c. a parallel-to-serial converter for converting the convolutionally coded input transmission data and the convolutionally coded delayed transmission data into serial data;
d. a PSK modulation unit for PSK modulating the parallel-to-serial converted data; and
e. a frequency converter for converting the frequency of the PSK modulated data, wherein the transmit output section transmits the frequency converted data;
the convolutional coder is further configured to convolutionally code the input transmission data to output a plurality of data sequences;
the transmission delay unit is further configured to add the time delay to the plurality of data sequences in order to output the delayed transmission data; and
the parallel-to-serial converter converts the plurality of data sequences and the delayed transmission data from parallel into serial. - View Dependent Claims (45)
the transmission delay unit is further configured to give the convolutionally coded data corresponding to each of the plurality of data sequences a first transmission delay time corresponding to a first set of data sequences to output in a first set of transmission data, and gives the convolutionally coded data corresponding to each of the plurality of data sequences a second transmission delay time corresponding to a second set of data sequences to output in a second set of transmission data; - and
the parallel-to-serial converter is further configured to convert the first set of transmission data and the second set of transmission data from parallel into serial.
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46. A communication system comprising:
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a transmitter, which;
inputs transmission data, generates delayed transmission data having a time delay associated therewith relative to the input transmission data, multiplexes the delayed transmission data with the input transmission data to generate multiplexed data, modulates the multiplexed data to generate a transmission signal, and transmits the transmission signal; and
a receiver, which detects the delayed transmission data and the transmission data in a received signal;
compensates for a phase shift associated with the received signal based on the detected delayed transmission data and the transmission data; and
demodulates the received signal based on the delayed transmission data and the transmission data.
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47. A communication method comprising steps of:
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inputting transmission data;
generating delayed transmission data having a time delay;
multiplexing the delayed transmission data and the transmission data to generate a multiplexed data;
modulating the multiplexed data to generate a transmission signal;
transmitting the transmission signal;
receiving the transmission signal transmitted by the transmitter as a received signal;
detecting the delayed transmission data and the transmission data included in the received signal;
compensating for a phase shift of the received signal based on the delayed transmission data and the transmission data; and
demodulating data of the received signal based on the delayed transmission data and the transmission data.
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Specification