System and method for providing the speculative return of cached data within a hierarchical memory system

• US 6,457,101 B1
• Filed: 12/20/1999
• Issued: 09/24/2002
• Est. Priority Date: 12/20/1999
• Status: Expired due to Term

• Current Assignee: Unisys Corporation
• Original Assignee: Unisys Corporation
• Inventors: Kalvestrand, Donald R., Bauman, Mitchell A., Schibinger, Joseph S., Gilbertson, Roger L., Tokoly, Daniel S.
• Primary Examiner(s): BRAGDON, REGINALD GLENWOOD
• Application Number:
  US09/468,050
• Time in Patent Office: 1,009 Days
• Field of Search: 711/122, 711/143, 711/145
• US Class Current: 711/122
• CPC Class Codes: G06F 12/0811 with multilevel cache hierarchies
• CPC Class Codes: G06F 12/0817 using directory methods
• CPC Class Codes: G06F 12/0862 with prefetch
• CPC Class Codes: G06F 2212/507 using speculative control

Abstract

A hierarchical memory structure includes a directory-based main memory coupled to multiple first storage devices, each to store data signals retrieved from the main memory. Ones of the first storage devices are further respectively coupled to second storage devices, each to store data signals retrieved from the respectively coupled first storage devices. Fetch requests to retrieve data signals are issued by ones of the storage devices to the main memory. In response, the main memory determines where the most recent data copy resides, and issues a return request, if necessary to retrieve that copy for the requesting storage device. A speculative return generation logic circuit is coupled to at least two of the first storage devices to intercept the fetch requests. In response to an intercepted request, the speculative return generation logic circuit generates a speculative return request directly to one or more of the other coupled first storage devices. This speculative return request causes any updated copies of the requested data signals that may be stored at a lower level in the hierarchical memory, to be transferred to the first storage device. If a return request for the data is then issued by the main memory in response to the fetch request, the requested data signals are resident in a first storage device, and are readily available to the main memory.

Claims

1. For use in a directory-based memory system including a main memory coupled to multiple cache memories, each of the cache memories being capable of generating fetch requests to obtain data signals from the main memory, the main memory being capable of issuing return requests to retrieve a copy of any of the requested data signals from any of the multiple cache memories to be provided to a requesting one of the cache memories, a speculative return system, comprising:

a speculative return generation logic circuit coupled to receive a fetch request from any of predetermined ones of the multiple cache memories, and in response to each said fetch request, to generate a speculative return request to a predetermined non-requesting one of the cache memories; and

a function processing logic circuit coupled to receive from said speculative return generation logic circuit each said speculative return request, and in response thereto, to cause said predetermined non-requesting one of the cache memories to retrieve from associated other ones of the cache memories coupled to said predetermined non-requesting one of the cache memories any of the data signals requested by said fetch request and that are stored by said associated other ones of the cache memories, whereby any of the data signals transferred to said predetermined non-requesting one of the cache memories is more readily available for retrieval by the main memory in response to an issued return request.

2. The system of claim 1, and further including a command-type compare logic circuit coupled to said speculative return generation logic circuit to enable said speculative return generation logic circuit to generate ones of said speculative return requests in response to only predetermined ones of the fetch requests.

3. The system of claim 1, and further comprising:

multiple ones of said speculative return logic circuits each to generate ones of said speculative return requests;

multiple ones of said function processing logic circuits, each of said function processing logic circuits coupled to receive a speculative return request from any respectively associated one of said multiple speculative return logic circuits to be provided to a respectively associated predetermined non-requesting one of the cache memories, each said respectively associated predetermined non-requesting one of the cache memories being further respectively coupled to other ones of the cache memories, and wherein in response to each said speculative return request, each said function processing logic circuit causes said respectively associated predetermined non-requesting one of the cache memories to retrieve, and to store, any of the data signals requested by said speculative return request and that are stored by said respectively coupled other ones of the cache memories.

4. The system of claim 1, wherein said speculative return generation logic circuit includes a storage device to store each said speculative return request until each said speculative return request can be provided to said predetermined non-requesting one of the cache memories.

5. The system of claim 4, wherein said speculative return generation logic circuit is coupled to receive any of the return requests issued by the main memory to said predetermined non-requesting one of the cache memories, and further including circuits to delete any stored said speculative return request if said stored speculative return request is requesting the transfer of data signals that are also being requested by said return request received from the main memory.

6. The system of claim 1, wherein said speculative return generation logic circuit includes logic to generate a return-copy speculative return request, said return-copy speculative return request to cause said predetermined non-requesting one of the cache memories to retrieve a read-only copy of said data signals requested by said fetch request while allowing said associated other ones of the cache memories to retain a read-only copy of said data signals requested by said fetch request.

7. The system of claim 1, wherein said speculative return generation logic circuit includes logic to generate a return-original speculative return request, said return-original speculative return request to cause said predetermined non-requesting one of the cache memories to retrieve an exclusive copy of said any of the data signals requested by said fetch request and that are stored by said associated other ones of the cache memories while requesting that each of said associated other ones of the cache memories purge any copy of said data signals requested by said fetch request.

8. The system of claim 1, and further including a tag storage device coupled to said function processing logic circuit to store status indications associated with data signals stored in said predetermined non-requesting one of the cache memories, and whereby said function processing logic circuit includes circuits to read said tag storage device, and to thereafter cause said any of the data signals requested by the fetch request and that are stored by said associated other ones of the cache memories to be retrieved from said associated other ones of the cache memories only if the status indications associated with said any of the data signals requested by the fetch request indicate a predetermined status.

9. A hierarchical memory system, comprising:

a main memory to store data signals;

multiple first storage devices each coupled to said main memory each to make requests to retrieve ones of said data signals from said main memory, and wherein said main memory initiates a return request in response to each of ones of said requests to retrieve a latest copy of requested ones of said data signals from one or more of said multiple first storage devices to be provided to a requesting one of said multiple first storage devices; and

a speculative return generation circuit coupled to at least two associated ones of said multiple first storage devices to receive requests made by either of said at least two associated ones of said multiple first storage devices, and in response to any received request, to generate a speculative return request to the other one of said at least two associated ones of said multiple first storage devices to cause said other one of said at least two associated ones of said multiple first storage devices to prepare to send any stored said latest copy of said requested ones of said data signals to said main memory.

10. The system of claim 9, and further including at least one second storage device coupled to said other one of said at least two associated ones of said multiple first storage devices, and wherein said other one of said at least two associated ones of said multiple first storage devices includes a circuit to retrieve said any stored latest copy of said requested ones of said data signals from said at least one second storage device in response to receipt of said speculative return request.

11. The system of claim 10, and further including a tag storage device coupled to said at least one second storage device to store status signals indicating the status of data signals stored in said at least one second storage device, and wherein said circuit to retrieve said any stored latest copy of said requested ones of said data signals only performs a retrieval operation if said stored status signals indicate a predetermined status associated with said any stored latest copy of said requested ones of said data signals.

12. The system of claim 10, and further including at least one additional level of hierarchical storage devices coupled to said at least one second storage device, and wherein said other one of said at least two associated ones of said multiple first storage devices includes a circuit to retrieve said any stored latest copy of said requested ones of said data signals from said at least one additional level of hierarchical storage devices in response to receipt of said speculative return request.

13. The system of claim 9, wherein each of said multiple first storage devices is capable of making multiple types of requests, and wherein said speculative return generation circuit includes a compare circuit to enable said speculative return generation circuit to generate ones of said speculative return requests in response to predetermined ones of said multiple types of requests.

14. The system of claim 9, and further including at least two second storage devices each coupled to said other one of said at least two associated ones of said multiple first storage devices, and wherein said other one of said at least two associated ones of said multiple first storage devices includes a circuit to retrieve, in response to said speculative return request, predetermined first ones of said requested ones of said data signals from a first one of said at least two second storage devices, and to retrieve predetermined second ones of said requested ones of said data signals from a second one of said at least two second storage devices.

15. The system of claim 9, wherein said speculative return generation circuit includes a request storage device to store pending ones of said speculative return requests, and further including a function processing logic circuit coupled to said speculative return generation circuit to process said pending ones of said speculative return requests according to a predetermined priority scheme.

16. The system of claim 15, wherein said speculative return generation circuit includes a compare circuit to intercept return requests that are issued by said main memory to either of said at least two associated ones of said multiple first storage devices, said compare circuit to discard any of said pending ones of said speculative return requests stored in said request storage device associated with the same ones of said requested ones of said data signals as any of said intercepted return requests.

17. For use in a hierarchical memory system having a main memory coupled to multiple first storage devices, each of the multiple first storage devices to store data signals retrieved from the main memory, the hierarchical memory further including a speculative return generation system coupled to predetermined ones of the multiple first storage devices, a method of increasing throughput in the main memory, comprising the steps of:

generating a request by a requesting one of the multiple first storage devices to retrieve requested data signals from the main memory;

receiving said request by the speculative return generation system, and in response thereto, generating a speculative return request to a different one of the multiple first storage devices to prepare said different one of the multiple storage devices to return any stored ones of said requested data signals to the main memory;

determining that the main memory does not store the most recent copy of said requested data signals;

generating a return request from the main memory to said different one of the multiple first storage devices to retrieve a latest copy of said requested data signals from the main memory, whereby said latest copy of said requested data signals has been prepared for return to said main memory by said speculative return request.

18. The method of claim 17, wherein the hierarchical memory system further includes second storage devices coupled to said different one of the multiple first storage devices, and further including the step of retrieving, by said different one of the multiple first storage devices and in response to receipt of said speculative return request, a latest copy of said any stored ones of said requested data signals stored in one or more of said second storage devices.

19. The method of claim 18, wherein the hierarchical memory system includes a tag memory associated with said another predetermined one of the multiple first storage devices, and including the step of reading status signals from the tag memory to determine the state of said any stored ones of said requested data signals within said different one of the multiple first storage devices.

20. The method of claim 19, and wherein said step of retrieving said latest copy of said any stored ones of said requested data signals is performed only if said status signals indicate a predetermined status.