Fault tolerant process for the delivery of programs to writeable storage device utilizing pre-operating system software/firmware

• US 6,457,122 B1
• Filed: 06/18/1999
• Issued: 09/24/2002
• Est. Priority Date: 06/18/1999
• Status: Expired due to Term

• Current Assignee: Kinglite Holdings Inc.
• Original Assignee: Phoenix Technologies Limited (Pharaoh Acquisition LLC)
• Inventors: Ramezani, Mehran
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US09/336,073
• Time in Patent Office: 1,194 Days
• Field of Search: 713/1, 717/11, 717/168-178
• US Class Current: 713/1
• CPC Class Codes: G06F 11/1433 during software upgrading

Abstract

A method and apparatus for installing programs on a writeable storage device in a fault tolerant manner is described. A processor readable medium having instructions causes a processor to write at least one program to a writeable storage device. A state machine coupled to the processor readable medium indicates the write status of the program to the processor readable medium.

Claims

1. An apparatus comprising:

a processor readable medium having instructions which cause a processor to write at least one program to a writeable storage device during a first pre-operating system interval; and

a state machine coupled to said processor readable medium, wherein said state machine is configured to indicate a write status of said program to said processor readable medium during a second pre-operating system interval.

2. The apparatus of claim 1, wherein, after said first pre-operating system interval and upon successful execution, said program provides an acknowledgement to a non-volatile memory, said processor readable medium to further have instructions to cause said state machine to change states in response to said acknowledgement.

3. The apparatus of claim 1, wherein said writeable storage device is one of a hard drive, a floppy drive, and a CD-ROM.

4. The apparatus of claim 1, wherein said second pre-operating system interval occurs subsequently to said first pre-operating system interval.

5. An apparatus as in claim 1, wherein a state of said state machine is stored in a non-volatile memory.

6. An apparatus as in claim 5, wherein in a first state of said state machine, said processor readable medium is configured to disable writing said program to said writeable storage device.

7. An apparatus as in claim 5, wherein in a second state of said state machine, said processor readable medium is configured to write said program to said writeable storage device.

8. An apparatus as in claim 5, wherein in a third state of said state machine, said processor readable medium is configured to re-attempt writing said program to said writeable storage device.

9. An apparatus as in claim 5, wherein in a fourth state of said state machine, said processor readable medium is configured to display an error message on a display.

10. A method for writing at least one program to a writeable storage device, said method comprising:

storing a state from a plurality of states in a memory indicative of a write status in a first pre-operating system interval;

reading said state in said memory in a second pre-operating system interval; and

performing a function based on said state.

11. The method of claim 10, further comprising:

executing said at least one program;

providing an acknowledgement from said at least one program to a non-volatile memory, said acknowledgement to indicate that said at least one program executed successfully; and

changing said state in response to said acknowledgement.

12. The method of claim 10, wherein said writeable storage device is one of a hard drive, a floppy drive, and a CD-ROM.

13. The method of claim 10, wherein said second pre-operating system interval occurs subsequently to said first pre-operating system interval.

14. A method as in claim 10, wherein performing said function based on said state further comprises:

if said state from said plurality of states is a first state, then disabling writing said program to said writeable storage device;

if said state from said plurality of states is a second state, then writing said program to said writeable storage device;

if said state from said plurality of states is a third state, then re-writing said program to said writeable storage device;

if said state from said plurality of states is a fourth state, then displaying an error message on a display; and

if said state from said plurality of states is a fifth state, then transitioning to said second state after an occurrence of a predetermined event.

15. A method as in claim 14, wherein said predetermined event is a predetermined period of time.

16. A method as in claim 14, wherein said predetermined event is a predetermined number of occurrence of pre-operating system intervals.

17. A processor readable medium having stored thereon data representing a sequence of instructions, which when executed by a processor causes said processor to perform a method comprising:

storing a state from a plurality of states in a memory indicative of a write status of at least one program to a writeable storage device in a first pre-operating system interval;

reading said state in said memory in a second pre-operating system interval; and

performing a function based on said state.

18. A processor readable medium as in claim 17, wherein performing said function based on said state further comprises:

if said state from said plurality of states is a first state, then disabling writing said program to said writeable storage device;

if said state from said plurality of states is a second state, then writing said program to said writeable storage device;

if said state from said plurality of states is a third state, then re-writing said program to said writeable storage device;

if said state from said plurality of states is a fourth state, then displaying an error message on a display; and

if said state from said plurality of states is a fifth state, then transitioning to said second state after an occurrence of a predetermined event.

19. A processor readable medium as in claim 18, wherein said predetermined event is a predetermined period of time.

20. A processor readable medium as in claim 18, wherein said predetermined event is a predetermined number of occurrence of pre-operating system intervals.

22. A system as in claim 19, wherein a state of said state machine is stored in a non-volatile memory.

21. A system, comprising:

a processor;

a processor readable medium having one or more instructions which cause said processor to write at least one program to a writeable storage device during a first pre-operating system interval; and

a state machine coupled to said processor readable medium, wherein said state machine is configured to indicate a write status of said program to said processor readable medium during a second pre-operating system interval.

23. A system as in claim 21, wherein in a first state of said state machine, said processor readable medium is configured to disable writing said program to said writeable storage device.

24. A system as in claim 21, wherein in a second state of said state machine, said processor readable medium is configured to write said program to said writeable storage device.

25. A system as in claim 21, wherein in a third state of said state machine, said processor readable medium is configured to re-attempt writing said program to said writeable storage device.

26. A system as in claim 21, wherein in a fourth state of said state machine, said processor readable medium is configured to display an error message on a display.

27. A computer data signal embodied in a carrier wave comprising:

a first code segment configured to store a state from a plurality of states in a memory indicative of a write status in a first pre-operating system interval;

a second code segment configured to read said state in memory in second pre-operating system interval; and

a third code segment configured to perform a function based on said state.

28. A computer data signal as in claim 27, wherein performing said function based on said state further comprises:

if said state from said plurality of states is a first state, then a fourth code segment configured to disable writing said program to said writable storage device;

if said state from said plurality of states is a second state, then a fifth code segment configured to write said program to said writeable storage device;

if said state from said plurality of states is a third state, then a sixth code segment configured to re-write said program to said writeable storage device;

if said state from said plurality of states is a fourth state, then a seventh code segment configured to display and error message on a display; and

if said state from said plurality of states is a fifth state, then an eighth code segment configured to transition to said second state after an occurrence of a predetermined event.