Pulse modulated digital to analog converter (DAC)

• US 6,459,398 B1
• Filed: 07/20/1999
• Issued: 10/01/2002
• Est. Priority Date: 07/20/1999
• Status: Expired due to Term

• Current Assignee: ST-Ericcson SA (Telefonaktiebolaget LM Ericsson)
• Original Assignee: DSPC Technologies Limited
• Inventors: Gureshnik, Eran, Stalberg, Arie, Yakobovich, Shlomo, Yellin, Daniel
• Primary Examiner(s): Jeanpierre, Peguy
• Assistant Examiner(s): Jeanglaude, Jean Bruner
• Application Number:
  US09/357,235
• Time in Patent Office: 1,169 Days
• Field of Search: 341/144, 341/152, 341/145, 341/131, 341/139, 341/138
• US Class Current: 341/144
• CPC Class Codes: H03M 3/502 Details of the final digital/analogue conversion following the digital delta-sigma modulation
• CPC Class Codes: H03M 7/3008 by averaging out the errors, e.g. using dither
• CPC Class Codes: H03M 7/3028 the quantiser being a single bit one

Abstract

A switchable low pass filter includes a first switch connected to a first resistive element, a second switch connected to a second resistive element, and a capacitive element connected to the first and second resistive elements. The switchable low pass filter also includes a controller connected to the first switch and the second switch, the controller operative to open and close at least one of the first switch and the second switch. A method for producing a pulse density modulated signal whose pulse timing is jittered includes the following steps; adding a substantially random number and a multi-bit number to a value stored in a flip flop, thereby producing a sum; if the sum is less than an upper limit, storing the sum in the flip flop, thereby replacing the value; if the sum is not less than the upper limit, producing a pulse, subtracting the upper limit from the sum, thereby producing a result, and storing the result in a flip flop; and repeating the steps.

Claims

1. A switchable low pass filter comprising:

a first switch connected to a first resistive element;

a second switch connected to a second resistive element;

a capacitive element connected to said first resistive element and to said second resistive element; and

a controller coupled to said first switch and said second switch, said controller adapted to alter the effective resistance of said switchable low pass filter by opening or closing either of said switches.

2. A switchable low pass filter according to claim 1, wherein said first resistive element has a resistance which is smaller than the resistance of said second resistive element.

3. A device comprising:

a plurality of resistive elements;

at least one switch connected to one of said resistive elements;

a capacitive element connected to said resistive elements thereby forming a low pass filter with said resistive elements; and

a controller connected to said at least one switch, said controller operative to open and close said at least one switch thereby switching the resistance of said low pass filter.

4. A device comprising:

a plurality of resistive elements;

at least one switch connected to one of said resistive elements;

a capacitive element connected to said resistive elements thereby forming a low pass filter with said resistive elements, said low pass filter having a response time; and

a controller connected to said at least one switch, said controller operative to open and close said at least one switch thereby changing said response time.

5. A digital to analog converter comprising:

a digital circuit which produces a pulse modulated signal; and

a switchable low pass filter having a plurality of response times for converting said pulse modulated signal to an analog signal having ripples,

wherein switching said low pass filter among said response times changes the size of said ripples.

6. A digital to analog converter according to claim 5, wherein said digital circuit is a pulse width modulation circuit.

7. A digital to analog converter according to claim 5, wherein said digital circuit is a pulse density modulation circuit.

8. A digital to analog converter according to claim 5, wherein said switchable low filter comprises:

a first switch connected to a first resistive element;

a second switch connected to a second resistive element;

a capacitive element connected to said first resistive element and said second resistive element; and

a controller connected to said first switch and said second switch, said controller operative to open and close at least one of said first switch and said second switch.

9. A digital to analog converter according to claim 8, wherein said first resistive element has a resistance which is smaller than the resistance of said second resistive element.

10. A device for producing a pulse density modulated signal whose pulse timing is jittered, the device comprising:

a flip flop for storing a value;

a random number generator for producing a substantially random number; and

an adder for adding said substantially random number and a multi-bit number to said value, said adder having an upper limit,

wherein a pulse is produced when the sum of said substantially random number, said multi-bit number and said value is not less than said upper limit.

11. A method for producing a pulse density modulated signal whose pulse timing is jittered, the method comprising the steps of:

adding a substantially random number and a multi-bit number to a value stored in a flip flop, thereby producing a sum;

if said sum is less than an upper limit, storing said sum in said flip flop, thereby replacing said value;

if said sum is not less than said upper limit, producing a pulse;

subtracting said upper limit from said sum, thereby producing a result; and

storing said result in a flip flop; and

repeating said steps.