Method and apparatus for RF common-mode noise rejection in a DSL receiver

• US 6,459,739 B1
• Filed: 12/30/1999
• Issued: 10/01/2002
• Est. Priority Date: 12/30/1999
• Status: Expired due to Term

• Current Assignee: Tioga Technologies Incorporated
• Original Assignee: Tioga Technologies Incorporated
• Inventors: Vitenberg, Roman
• Primary Examiner(s): Le, Amanda T.
• Application Number:
  US09/476,746
• Time in Patent Office: 1,006 Days
• Field of Search: 375/257, 375/258, 375/346, 375/349, 375/350, 379/416, 333/12
• US Class Current: 375/258
• CPC Class Codes: H04B 3/30 Reducing interference caused by unbalanced currents in a normally balanced line
• CPC Class Codes: H04L 25/0274 Arrangements for ensuring balanced coupling
• CPC Class Codes: H04L 25/0292 Arrangements specific to the receiver end
• CPC Class Codes: H04L 25/10 Compensating for variations in line balance
• CPC Class Codes: H04L 27/0002 analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line duplex arrangements H04L5/143

Abstract

A receiver for high-speed data communications, which receives a differential signal through a pair of signal lines. The receiver includes a common-mode choke, which has first and second signal windings, which are respectively coupled in series to the pair of signal lines so as to attenuate common-mode interference in the differential signal. The choke also has a sampling winding, which is inductively coupled to the signal windings so as to generate a sampled signal responsive to current flowing in the signal windings. Signal processing circuitry is coupled to receive the sampled signal from the sampling winding and to receive the differential signal from the signal windings and to process the differential signal responsive to the sampled signal.

Claims

1. A receiver for high-speed data communications, which is adapted to receive a differential signal through a pair of signal lines, the receiver comprising:

a common-mode choke, comprising;

first and second signal windings, which are configured to be respectively coupled in series to the pair of signal lines so as to attenuate commonmode interference in the differential signal; and

a sampling winding, which is inductively coupled to the signal windings so as to generate a sampled signal responsive to current flowing in the signal windings; and

signal processing circuitry, which is coupled to receive the sampled signal from the sampling winding and to receive the differential signal from the signal windings and to process the differential signal responsive to the sampled signal.

2. A receiver according to claim 1, wherein the sampled signal is generated responsive to the common-mode interference, and wherein the circuitry processes the differential signal to cancel the attenuated common-mode interference out of the differential signal.

3. A receiver according to claim 2, wherein the circuitry processes the sampled signal to derive an estimate of the common-mode interference, which is subtracted from the differential signal.

4. A receiver according to claim 2, wherein the sampled signal is conveyed to the processing circuitry substantially without reference to a ground.

5. A receiver according to claim 1, wherein the sampling winding is electrically isolated from the signal windings.

6. A receiver according to claim 1, and comprising a transformer, which comprises a primary winding coupled to receive the differential signal from the signal windings of the choke and a secondary winding coupled to convey the differential signal to the signal processing circuitry, wherein the primary winding comprises a center tap which is grounded.

7. A receiver according to claim 1, wherein the pair of signal lines comprises a twisted pair of lines.

8. A receiver according to claim 7, wherein the differential signal comprises a Digital Subscriber Line (DSL) signal, and wherein the signal processing circuitry comprises modem circuitry for decoding the DSL signal.

9. A receiver according to claim 8, wherein the Digital Subscriber Line signal comprises a Very High Rate Digital Subscriber Line (VDSL) signal.

10. A receiver according to claim 1, wherein the first and second signal windings are wound together in a common winding direction and have substantially equal respective inductances.

11. A receiver according to claim 1, wherein the common-mode choke comprises a core upon which the signal windings and the sampling winding are commonly wound.

12. A receiver according to claim 1, wherein the sampling winding is electrically isolated from the signal windings.

13. A method for processing a differential signal received on a pair of signal lines, comprising:

coupling a pair of inductive elements in series with the respective signal lines so as to attenuate common-mode interference in the lines relative to the differential signal;

inductively sampling electrical currents in the inductive elements so as to generate a sampled signal; and

processing the differential signal responsive to the sampled signal so as to enhance a signal-to-noise characteristic of the differential signal following the inductive elements.

14. A method according to claim 13, wherein inductively sampling the currents comprises sampling the common-mode interference, and wherein processing the differential signal comprises reducing the common-mode interference in the differential signal.

15. A method according to claim 14, wherein reducing the common-mode interference comprises deriving an estimate of the interference and subtracting the estimated interference from the differential signal.

16. A method according to claim 13, wherein the differential signal comprises a Digital Subscriber Line signal.