Generic finger architecture for spread spectrum applications

• US 6,459,883 B2
• Filed: 07/31/2001
• Issued: 10/01/2002
• Est. Priority Date: 07/31/2000
• Status: Expired due to Term

• Current Assignee: Apple Inc., Intel Corporation
• Original Assignee: MorphICs Technology, Inc. (Infineon Technologies AG)
• Inventors: Holmes, David M., Krishnan, Murali, Subramanian, Ravi, Medlock, Joel D., Rieken, Keith, Jha, Uma
• Primary Examiner(s): Hunter, Daniel
• Assistant Examiner(s): LE, LANA N
• Application Number:
  US09/920,094
• Publication Number:
  US 20020018518A1
• Time in Patent Office: 427 Days
• Field of Search: 455/130, 455/131, 455/67.1, 455/67.6, 375/142, 375/144, 375/148, 375/150
• US Class Current: 455/67.11
• CPC Class Codes: H04B 1/7115 Constructive combining of multi-path signals, i.e. RAKE receivers
• CPC Class Codes: H04B 1/7117 Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers
• CPC Class Codes: H04B 2201/7071 with dynamic control of receiver resources
• CPC Class Codes: H04L 2027/0026 Correction of carrier offset

Abstract

A rake receiver in accordance with an exemplary embodiment of this invention is configurable by an external agent (e.g., microcontroller, DSP, or state machine) to suit the particular requirements of different spread spectrum systems. In an exemplary embodiment, the receiver includes multiple fingers. Each finger includes a plurality of generic despreaders/descramblers, a plurality of generic dechannelizers coupled to the despreaders/descramblers, and at least one timing estimation controller coupled to the despreaders/descramblers. The finger also includes at least one phase estimation controller, at least one frequency estimation controller, and at least one energy estimation controller all coupled to the generic dechannelizers.

Claims

1. A receiver finger in a spread spectrum system, comprising:

a plurality of generic despreader/descrambler units;

a plurality of generic dechannelizer units coupled to said plurality of generic despreader/descrambler units;

at least one timing estimation controller coupled to said plurality of despreader/descrambler units;

at least one phase estimation controller coupled to said plurality of dechannelizer units;

at least one frequency estimation controller coupled to said plurality of dechannelizer units; and

at least one energy estimation controller coupled to said plurality of dechannelizer units.

2. The receiver finger of claim 1, wherein at least one of said plurality of generic despreader/descrambler units is coupled to a generic code generation unit for receiving despreading code and descrambling code.

3. The receiver finger of claim 1, wherein said plurality of generic dechannelizers are coupled to a generic code generation unit for receiving dechannelization codes.

4. The receiver finger of claim 1, wherein said plurality of generic despreader/descrambler units selectively receives Early, On-Time, and Late samples.

5. The receiver finger of claim 1, wherein said plurality of generic dechannelizer units receives inputs from at least one of said plurality of generic despreader/descrambler units.

6. The receiver finger of claim 1, wherein said phase estimation controller is coupled to at least one of said plurality of generic dechannelizer units to receive a pilot signal.

7. The receiver finger of claim 1, wherein said frequency estimation controller is coupled to at least one of said plurality of generic dechannelizer units to receive a pilot signal.

8. The receiver finger of claim 1, wherein said energy estimation controller is coupled to at least one of said plurality of generic dechannelizer units to receive a pilot signal.

9. The receiver finger of claim 1, wherein said timing estimation controller is coupled to at least one of said plurality of generic despreader/descrambler units to receive Early, On-Time, and Late samples.

10. The receiver finger of claim 1, wherein said timing, phase, frequency, and energy estimation controllers are implemented in an instruction set processor.

11. The receiver finger of claim 10, wherein said instruction set processor is a programmable micro digital signal processor.

12. The receiver finger of claim 1, wherein said timing, phase, frequency, and energy estimation controllers are implemented in a parameterizable hardware.

13. The receiver finger of claim 12, wherein said parameterizable hardware includes application specific integrated circuits.