Microprocessor based mixed signal field programmable integrated device and prototyping methodology

• US 6,460,172 B1
• Filed: 06/21/2000
• Issued: 10/01/2002
• Est. Priority Date: 10/10/1996
• Status: Expired due to Fees

• Current Assignee: Semiconductores Investigacion y Diseno SA
• Original Assignee: Semiconductors Investigacion Diseno SA
• Inventors: Insenser Farre, Jose Maria, Faura Enriquez, Julio
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Dinh, Paul
• Application Number:
  US09/598,588
• Time in Patent Office: 832 Days
• Field of Search: 716/1-5, 716/16-18, 716/8-10, 716/12, 326/37-41, 703/13-15, 703/23, 703/28
• US Class Current: 326/38
• CPC Class Codes: G06F 30/331 with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A user-programmable integrated circuit that includes over the same silicon die a) a set of programmable logic cells such as the ones used in already reported FPGAs; b) a set of programmable mixed signal and analog cells, in particular the necessary circuitry for signal conditioning acquisition and generation, such as operational amplifiers, filters, comparators, analog-to-digital converters (ADCs) and digital-to-analog converters (DACs); c) a microprocessor used both for controlling and configuring the whole system and for running general purpose user programs; and d) optimized interfaces between these three blocks that would allow the user to read the digital signals implemented in the programmable logic array as memory locations in real time, directly interface the digital part of the analog and digital signals from the microprocessor and from the programmable logic, and configure and dynamically reconfigure all the programmable features of the system with the microprocessor, between countless other possibilities.

Claims

1. A microprocessor-based, mixed-signal field programmable integrated circuit on a chip, comprising:

an array of digital programmable cells, and a programmable routing architecture that is configurable to interconnect said array of digital programmable cells in a predetermined manner, and a set of programmable digital pads for input/output communication to the outside of the chip;

a set of analog programmable cells for signal conditioning, acquisition and generation, and a set of programmable analog pads for communication to the outside of the chip; and

a microprocessor used to a) configure the digital and analog programmable cells, the routing architecture, the digital pads, and the analog pads through write operations, and used to b) probe in real time the status of the analog signals through an analog-to-digital converter and the status of the digital signals through normal memory access of the user application, and used to c) run general purpose computational and control programs specified by a user and also to control the set of programmable digital pads.

2. The microprocessor-based, mixed-signal field programmable integrated circuit on a chip according to claim 1, wherein the digital programmable cells include four flip-flops and four LUTs.

3. The microprocessor-based, mixed-signal field programmable integrated circuit on a chip according to claim 1, including a double memory cell to backup each configuration feature of the system in order to provide a multi-context dynamic reconfiguration capability.

4. A hardware-software co-emulation methodology on a single programmable piece of silicon, comprising the integration of:

all necessary first CAD tools for the design of general purpose digital applications on a field programmable digital circuit, the first CAD tools including schematic capture, technology mapping, placement, routing, and device programming;

all second CAD tools for the design of analog and mixed signal applications including signal conditioning, acquisition and output generation, the second CAD tools including schematic capture, technology mapping, placement routing, and device programming;

all necessary software tools for the design of applications on a microprocessor;

an integrated framework for the communication and combined operation of the first CAD tools, the second CAD tools and the software tools in such a way that they share their data and provide a consistent and integrated methodology; and

an integrated hardware-software co-emulator capable of measuring in real time the state of internal signals, using an internal on-chip microprocessor, and also providing software emulation capabilities.