Schottky device

• US 6,462,393 B2
• Filed: 03/20/2001
• Issued: 10/08/2002
• Est. Priority Date: 03/20/2001
• Status: Expired due to Term

• Current Assignee: Diodes Incorporated
• Original Assignee: FabTech, Inc. (Diodes Incorporated)
• Inventors: Hamerski, Roman J., Buchanan, Walter R.
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): TRAN, MAI HUONG C
• Application Number:
  US09/812,738
• Publication Number:
  US 20020135038A1
• Time in Patent Office: 567 Days
• Field of Search: 257/476, 257/478, 357/15, 357/22, 357/38, 357/58, 148/DIG.88
• US Class Current: 257/475
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

An improved Schottky device, having a low resistivity layer of semiconductor material, a high resistivity layer of semiconductor material and a buried dopant region positioned in the high resistivity layer utilized to reduce reverse leakage current. The low resistivity layer can be an N⁺ material while the high resistivity layer can be an N⁻ layer. The buried dopant region can be of P⁺ material, thus forming a PN junction with an associated charge depletion zone in the N⁻ layer and an associated low reverse leakage current. The location of the P⁺ material allows for a full Schottky barrier between the N⁻ material and a barrier metal to be maintained, thus the device experiences a low forward voltage drop.

Claims

1. A semiconductor device having improved forward voltage drop and reverse leakage current characteristics, the device comprising:

a low resistivity layer of semiconductor material having a first conductivity type and having first and second low resistivity layer surfaces;

a high resistivity layer of semiconductor material having the first conductivity type and having first and second high resistivity layer surfaces, the first high resistivity layer surface being contiguous with the first low resistivity surface;

a dopant region buried in the high resistivity layer; and

a barrier metal formed on the second high resistivity layer surface.

2. The semiconductor device as claimed in claim 1 wherein the high resistivity layer is an epitaxial layer.

3. The semiconductor device as claimed in claim 1 wherein the low resistivity layer is formed by a diffusion process.

4. The semiconductor device as claimed in claim 1 wherein the dopant region is spaced closer to the second high resistivity layer surface.

5. The semiconductor device as claimed in claim 1 wherein the dopant region includes at least one dot.

6. The semiconductor device as claimed in claim 1 wherein the dopant region includes at least one stripe.

7. The semiconductor device as claimed in claim 1 wherein the dopant region is a solid region.

8. The semiconductor device as claimed in claim 1 wherein the dopant region includes a second conductivity type.

9. The semiconductor device as claimed in claim 8 wherein the second conductivity type is a P conductivity type.

10. The semiconductor device as claimed in claim 1, further comprising a second type of dopant portion between the dopant region and the second surface of the high resistivity layer.

11. The semiconductor device as claimed in claim 10 wherein the second type of dopant portion will be of the first conductivity type and approximate dopant level as the high resistivity layer.

12. The semiconductor device as claimed in claim 1 wherein the dopant region is implanted through ion implantation.

13. The semiconductor device as claimed in claim 1 further including a guard ring adjacent to the barrier metal.

14. The semiconductor device as claimed in claim 13 wherein the guard ring is further incorporated within the high resistivity layer.

15. The semiconductor device as claimed in claim 13 wherein the guard ring includes P conductivity type.

16. The semiconductor device as claimed in claim 13 wherein the guard ring includes P and N conductivity types.

17. A layer of a Schottky device, the layer comprising:

a region of a first conductivity type; and

a volume of a second conductivity type encapsulating the region.

18. The layer according to claim 17 wherein the region is primarily boron.

19. The layer according to claim 17 wherein an outside perimeter of the region is substantially circular.

20. The layer according to claim 17 wherein the region has opposed first and second sides.

21. The layer according to claim 17 wherein the region includes an elongated region.

22. The layer according to claim 17 further comprising a plurality of regions each of the regions including opposing sides.

23. The layer according to claim 22 wherein each of the regions is spaced from one another.

24. A semiconductor device comprising:

a first layer of semiconductor material of a first conductivity type, the first layer of semiconductor material having a first side and a second side;

a region of semiconductor material of a region conductivity type, positioned such that the first layer of semiconductor material surrounds the region of semiconductor material; and

a second layer of semiconductor material of a second conductivity type, the second layer of semiconductor material having opposing first and second sides, wherein the first opposing side is adjacent to the first side of the first layer of semiconductor material.

25. The semiconductor device as claimed in claim 24 wherein the region conductivity type is P type.

26. The semiconductor device as claimed in claim 24 wherein the first conductivity type and the second conductivity type are N type.

27. The semiconductor device as claimed in claim 24 further including a conductor in physical contact with the second side of the second layer of semiconductor material;

and

a barrier metal adjacent to the second side of the first layer of semiconductor material and forming a Schottky junction with the first layer of semiconductor material.

28. The semiconductor device as claimed in claim 27 in which the forward voltage drop at a current density of 157 amperes/cm² does not exceed approximately 305 millivolts and the reverse leakage current does not exceed approximately 180 microamperes at 30 volts reverse bias.