System for real-time control of semiconductor wafer polishing

• US 6,464,561 B2
• Filed: 10/04/2001
• Issued: 10/15/2002
• Est. Priority Date: 08/25/1993
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Sandhu, Gurtej S., Doan, Trung Tri
• Primary Examiner(s): Eley, Timothy V.
• Application Number:
  US09/971,723
• Publication Number:
  US 20020016131A1
• Time in Patent Office: 376 Days
• Field of Search: 451/5, 451/8, 451/9, 451/10, 451/11, 451/41, 451/59, 451/63, 451/285, 451/286, 451/287, 451/288, 451/289
• US Class Current: 451/5
• CPC Class Codes: B23Q 15/013 Control or regulation of feed movement B23Q15/12 takes precedence
• CPC Class Codes: B23Q 15/12 Adaptive control, i.e. adjusting itself to have a performance which is optimum according to a preassigned criterion
• CPC Class Codes: B24B 13/015 of television picture tube viewing panels, headlight reflectors or the like
• CPC Class Codes: B24B 37/013 Devices or means for detecting lapping completion
• CPC Class Codes: B24B 37/015 Temperature control
• CPC Class Codes: B24B 37/107 in a rotary movement only, about an axis being stationary during lapping
• CPC Class Codes: B24B 37/12 Lapping plates for working plane surfaces
• CPC Class Codes: B24B 37/205 provided with a window for inspecting the surface of the work being lapped
• CPC Class Codes: B24B 49/003 involving acoustic means
• CPC Class Codes: B24B 49/02 according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent B24B49/12 takes precedence
• CPC Class Codes: B24B 49/04 involving measurement of the workpiece at the place of grinding during grinding operation
• CPC Class Codes: B24B 49/10 involving electrical means B24B49/02, B24B49/08 take precedence
• CPC Class Codes: B24B 49/12 involving optical means
• CPC Class Codes: B24B 57/02 for feeding of fluid, sprayed, pulverised, or liquefied grinding, polishing or lapping agents
• CPC Class Codes: G05B 19/404 characterised by control arrangements for compensation, e.g. for backlash, overshoot, tool offset, tool wear, temperature, machine construction errors, load, inertia G05B19/19, G05B19/41 take precedence
• CPC Class Codes: G05B 2219/34403 RTI real time, kernel, processing
• CPC Class Codes: G05B 2219/37398 Thickness
• CPC Class Codes: G05B 2219/37602 Material removal rate
• CPC Class Codes: G05B 2219/45026 Circuit board, pcb
• CPC Class Codes: G05B 2219/45199 Polish
• CPC Class Codes: G05B 2219/45232 : CMP chemical mechanical polishing of wafer
• CPC Class Codes: G05B 2219/49052 : Accessory, coolant
• CPC Class Codes: G05B 2219/49057 : Controlling temperature of workpiece, tool, probe holder

Abstract

A system for polishing a semiconductor wafer, the system comprising a wafer polishing assembly for polishing a face of a semiconductor wafer at a polishing rate and a polishing uniformity, the wafer polishing assembly including a platen subassembly defining a polishing area, and a polishing head selectively supporting a semiconductor wafer and holding a face of the semiconductor wafer in contact with the platen subassembly to polish the wafer face; and a controller selectively adjusting one of a plurality of adjustable polishing parameters during polishing of the wafer.

Claims

1. A method of polishing a semiconductor wafer, comprising:

biasing a polishing pad and said wafer against each other;

sensing a change in pressure between said polishing pad and said wafer at a wafer/pad contact point; and

changing a bias between said polishing pad and said wafer at said wafer/pad contact point.

2. The method of claim 1, wherein sensing a change in pressure comprises sensing an increase in pressure;

and wherein changing a bias comprises increasing said bias.

3. The method of claim 2, wherein increasing said bias comprises increasing said bias along a circumference of said wafer, said circumference intersecting said wafer/pad contact point.

4. The method of claim 2, wherein increasing said bias comprises exerting pressure on said pad through said wafer.

5. The method of claim 1, wherein sensing a change in pressure comprises sensing an increase in pressure.

6. The method of claim 1 wherein changing a bias comprises increasing said bias.

7. A method of chemical mechanical polishing of an integrated circuit wafer, comprising:

biasing a polishing pad and said wafer against each other;

sensing a change in pressure between said polishing pad and said wafer at a wafer/pad contact point; and

changing a bias between said polishing pad and said wafer in response to sensing.

8. The method of claim 7, wherein sensing a change in pressure comprises sensing an increase in pressure;

and wherein changing a bias comprises increasing said bias.

9. The method of claim 8, wherein increasing said bias comprises increasing said bias along a circumference of said wafer, said circumference intersecting said water/pad contact point.

10. The method of claim 8, wherein increasing said bias comprises exerting pressure on said pad through said wafer.

11. The method of claim 7, wherein sensing a change in pressure comprises sensing an increase in pressure.

12. The method of claim 7 wherein changing a bias comprises increasing said bias.