Method of fabricating suspended microstructures

• US 6,465,355 B1
• Filed: 04/27/2001
• Issued: 10/15/2002
• Est. Priority Date: 04/27/2001
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Company (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Horsley, David
• Primary Examiner(s): Utech, Benjamin L.
• Assistant Examiner(s): CHEN, KIN CHAN
• Application Number:
  US09/844,356
• Publication Number:
  US 20020160611A1
• Time in Patent Office: 536 Days
• Field of Search: 438/694, 438/699, 438/700, 438/52, 438/411, 438/412, 438/619
• US Class Current: 438/694
• CPC Class Codes: B81B 2203/0315 Cavities
• CPC Class Codes: B81C 1/00142 Bridges deformable micromirrors G02B26/0841
• CPC Class Codes: B81C 2201/056 Releasing structures at the end of the manufacturing process
• CPC Class Codes: B81C 2203/036 Fusion bonding

Abstract

A method of fabricating a non-perforate suspended platform on a bonded-substrate is disclosed. The method includes forming a dielectric layer on a support surface of a base substrate followed by patterning an interface surface of the dielectric layer to define a well feature. The well feature is etched until a well having a depth that leaves a thin protective layer of the dielectric layer covering the support surface. Next a platform substrate is urged into contact with the base substrate followed by annealing the base and platform substrates to fusion bond the interface surface with a mounting surface of the platform substrate. The platform substrate is thinned, to form a membrane over a sealed cavity defined by the well and the mounting surface. The membrane is patterned and etch to form a plurality of trenches that extend through the membrane to the sealed cavity and define a suspended platform and a flexure. A selective etch material such as HF is used to remove the remaining dielectric layer from beneath the platform and the flexures thereby freeing the suspended platform and the flexures.

Claims

1. A method of fabricating a suspended platform on a bonded-substrate that includes a platform substrate that is bonded to a base substrate, comprising:

forming a dielectric layer on a support surface of the base substrate;

patterning an interface surface of the dielectric layer to define a well feature thereon;

etching the well feature until a well having a preselected depth that leaves a thin protective layer of the dielectric layer covering the support surface is formed;

bonding the base and platform substrates to each other by urging the interface surface into contact with a mounting surface of the platform substrate and annealing the base and platform substrates to fusion bond the interface surface with the mounting surface;

thinning the platform substrate to form a membrane over a sealed cavity defined by the well and the mounting surface;

patterning the membrane to define a flexture feature and a platform feature;

etching the flexture and platform features to form a plurality of trenches that extend through the membrane to the sealed cavity and define a suspended platform and a flexure; and

applying a selective etch material to remove the dielectric layer from beneath the suspended platform and the flexure.

2. The method as set forth in claim 1, wherein prior to patterning the interface surface, the dielectric layer is planarized to form a substantially planar interface surface.

3. The method as set forth in claim 2, wherein the dielectric layer has a thickness from about 0.50 μ

m to about 2.0 μ

m.

4. The method as set forth in claim 3, wherein the dielectric layer is silicon oxide.

5. The method as set forth in claim 2, wherein the planarization is accomplished by a process selected from the group consisting of grinding, polishing, and chemical mechanical planarization.

6. The method as set forth in claim 1, wherein the thinning of the platform substrate is accomplished by a process selected from the group consisting of grinding, polishing, lapping, and chemical mechanical planarization.

7. The method as set forth in claim 1, wherein the dielectric layer is silicon oxide and the platform substrate is chemically bonded to the base substrate by a silicon oxide fusion bond.

8. The method as set forth in claim 7, wherein the silicon oxide has a thickness from about 0.50 μ

m to about 2.0 μ

m.

9. The method as set forth in claim 1 and further comprising backthinning a back surface of the base substrate to reduce a thickness of the base substrate.

10. The method as set forth in claim 9, wherein the backthinning is accomplished by process selected from the group consisting of lapping, polishing, grinding, and chemical mechanical planarization.

11. The method as set forth in claim 9, wherein after the backthinning, the thickness of the base substrate is from about 200.0 μ

m to about 600.0 μ

m.

12. The method as set forth in claim 1, wherein the selective etch material is a hydrofluoric acid solution.

13. The method as set forth in claim 1, wherein the selective etch material has a differential etch rate and the dielectric layer beneath the suspended platform and the flexure is etched at a substantially faster etch rate than the dielectric layer at an interface between the interface surface and the mounting surface.

14. The method as set forth in claim 1, wherein any selected one or both of the platform substrate and the base substrate are made from single crystal silicon.

15. The method as set forth in claim 1, wherein the membrane has a thickness from about 10.0 μ

m to about 200.0 μ

m.

16. The method as set forth in claim 1, wherein the predetermined depth of the well is from about 0.40 μ

m to about 1.9 μ

m.

17. The method as set forth in claim 1, wherein the thin protective layer has a thickness less than about 0.20 μ

m.