Method for matching the lengths of signal traces

• US 6,466,008 B1
• Filed: 10/06/2000
• Issued: 10/15/2002
• Est. Priority Date: 10/06/2000
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Company (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Fung, Patrick Ying-Cheung, Wuebker, Carl Lewis
• Primary Examiner(s): Sherry, Michael
• Assistant Examiner(s): KOBERT, RUSSELL MARC
• Application Number:
  US09/680,577
• Time in Patent Office: 739 Days
• Field of Search: 324/765, 324/158.1, 324/766, 361/803, 361/777, 257/664, 257/738, 716/4, 716/5, 716/6, 716/10, 716/13
• US Class Current: 716/126
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: H05K 1/0237 High frequency adaptations H05K1/0216 takes precedence
• CPC Class Codes: H05K 1/14 Structural association of two or more printed circuits providing electric connection to or between printed circuits H05K1/11, H01R12/00
• CPC Class Codes: H05K 2201/044 Details of backplane or midplane for mounting orthogonal PCBs
• CPC Class Codes: H05K 2201/09236 Parallel layout
• CPC Class Codes: H05K 3/0005 for designing circuits by computer

Abstract

Method for obtaining a difference in lengths among a plurality of signal traces formed on two different surfaces, includes dividing a propagation delay of a first surface into a propagation delay of a second surface to obtain a correction factor. The segment of the signal traces formed on the second surface is adjusted by multiplying the correction factor to this segment. Then, the adjusted segment is summed with the segment of the signal traces formed on the first surface to obtain a total length. The total length of each of the signal traces is subtracted from the longest total length of the signal traces.

Claims

1. Method for matching the lengths a plurality of signal traces which are electrically connected to at least one integrated circuit chip, each of the signal traces including a board trace which is formed on a circuit board and electrically connected to a corresponding package trace formed on the integrated circuit chip, said method comprising:

multiplying a length of each of the package traces by a correction factor for the corresponding integrated circuit chip on which the package trace is formed;

summing a length of each of the board traces and a multiplied length of each of the corresponding package traces;

subtracting each of the signal traces from a length of a longest signal trace from the plurality of signal traces after the board traces and said multiplied lengths have been summed; and

,

adding a difference in length obtained from said subtraction to a shorter signal trace of said subtraction.

2. The method as defined in claim 1, wherein said correction factor is obtained by dividing a signal propagation delay of the integrated circuit chip by a propagation delay of the circuit board.

3. The method as defined in claim 1, wherein said multiplication, said summation and said subtraction are performed by a spreadsheet.

4. The method as defined in claim 3, wherein a result of said multiplication is stored in a database associated with said spreadsheet.

5. Method for matching the lengths a plurality of signal traces formed on a circuit board, said method comprising:

dividing each of the signal traces into at least two electrically conductive segments;

converting a difference in signal propagation delays between the signal traces being matched within said at least one of said segments into a difference in lengths;

subtracting each of the signal traces in said at least one of said segments from a longest signal trace of the signal traces in said at least one of said segments; and

,

adding a difference in length obtained from said subtraction to a shorter signal trace from said subtraction, so that said difference from said subtraction is less than said difference in length obtained from said conversion, if said difference from said subtraction is greater than said difference in length obtained from said conversion.

6. The method as defined in claim 5, wherein the signal said traces are divided by at least one pin provided on at least one the circuit board.

7. The method as defined in claim 5, wherein said board traces are divided by at least one pin formed on at least one an integrated circuit chip provided on the circuit board.

8. The method as defined in claim 5, wherein said conversion is performed by dividing said predetermined signal propagation difference by a signal propagation delay of the circuit board.

9. Method for matching the lengths of a plurality of signal traces which extend from a printed circuit board to a backplane via a connector provided on the printed circuit board, said method comprising:

dividing the signal traces into a first segment and a second segment;

summing a length of each of the signal traces in said first segment with a length of a corresponding connector trace in the connector;

subtracting each of the signal traces added with said connector traces in said first segment from a longest summed signal trace in said first segment;

adding a difference in length obtained from said subtraction to a shorter signal trace from said subtraction;

subtracting each of the signal traces in said second segment from a longest signal trace in said second segment; and

adding a difference in length obtained from said subtraction of said signal traces in said second segment to a shorter signal trace from said subtraction in said second segment.

10. The method as defined in claim 9 wherein said first segment is the printed circuit board and said second segment is the backplane.

11. The method as defined in claim 9 wherein said first segment is the backplane and said second segment is the printed circuit board.

12. The method as defined in claim 9 wherein when the signal traces in said first segment are connected to first package traces which are formed on at least one first integrated circuit package provided on the printed circuit board, said method further comprises,

multiplying a length of each of said first package traces by a first correction factor for said corresponding first integrated circuit package on which said package traces are provided; and,

adding said multiplied lengths of the said first package traces to said signal traces in said first segment to which said first package traces are connected, prior to said subtraction of the signal traces in said first segment.

13. The method as defined in claim 12 wherein when the signal traces in said second segment are connected to second package traces which are formed on at least one second integrated circuit package provided on the backplane, said method further comprises,

multiplying a length of each of said second package traces by a second correction factor for said corresponding second integrated circuit pakage on which said second package traces are provided;

and,

adding said multiplied lengths of the said second package traces to said signal traces in said second segment prior to said subtraction of the signal traces in said second segment.

14. The method as defined in claim 13, wherein said first correction factor is obtained by dividing a signal propagation delay of said first integrated circuit package by a signal propagation delay of the printed circuit board, and said second correction factor is obtained by dividing a signal propagation delay of said second integrated circuit package by a signal propagation delay velocity of the backplane.

15. The method as defined in claim 9, wherein said summation and said subtraction in said first segment, and said subtracting in said second segment are performed by a spreadsheet.

16. The method as defined in claim 9 wherein when the signal traces in said second segment are connected to package traces which are formed on at least one integrated circuit package on the backplane, said method further comprises,

multiplying a length of each of said package traces by a correction factor for the corresponding integrated circuit package on which said package traces are provided;

and,

adding said multiplied lengths of the said package traces to the signal traces in said second segment prior to said subtraction of the signal of the signal traces in the second segment.

17. Method for obtaining a length difference among a plurality of signal traces formed on two different surfaces, said method comprising:

dividing a propagation delay of a first surface of the two different surfaces into a propagation delay of a second surface of the two different surfaces to obtain a correction factor;

adjusting a second segment of the signal traces formed on said second surface by multiplying said second segment by said correction factor;

suninng said adjusted second segment with a first segment of the signal traces formed on said first surface to obtain a total length; and

subtracting said total length of each of the signal traces from a longest total length of the signal traces.