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Method and circuit for reducing voltage level variation in a bias voltage in a power converter

  • US 6,466,461 B2
  • Filed: 02/07/2002
  • Issued: 10/15/2002
  • Est. Priority Date: 02/09/2001
  • Status: Active Grant
First Claim
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1. A method for reducing voltage level variation in a bias voltage generated in a power converter device, the method comprising:

  • providing a first voltage source configured to supply a first voltage during one respective mode of operation of the power converter, wherein the level of the voltage supplied by the first voltage source is directly proportional to variation in an input voltage of the converter device;

    providing a second voltage source configured to supply a second voltage during another respective mode of operation of the power converter, wherein the level of the voltage supplied by the second voltage source has a generally inverse proportional relationship relative to variation in the input voltage of the converter device;

    selecting at least one circuit parameter in the voltage sources to adjust the respective levels of the first and second voltages; and

    combining the first and second voltages to generate a combined voltage that comprises the bias voltage in the power converter device, the combined voltage resulting in a bias voltage level being relatively impervious to variation in the input voltage of the converter device.

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