Receiver, intermittent frame synchronizing method and portable remote terminal
First Claim
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1. A receiver which comprises a slow clock generating means for outputting clock signals;
- an averaging means for dividing the clock signals transmitted from said slow clock generating means with separate periods, averaging said divided clock signals and outputting a slot timing signal to form a pulse signal which rises once in one slot time;
a saving counter for incrementing a counted value every time said slot timing signal is received and outputting a coincidence signal indicative of coincidence when said counted value coincides with the preset value; and
a receiving means for performing reception only for one slot time after said coincidence signal is received.
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Abstract
The present invention includes a receiver, an intermittent frame synchronizing method and a portable remote terminal which can reduce power consumption and cost, while the accuracy of generation of intermittent reception timings is maintained. For example, in the receiver, the intermittent frame synchronizing method and the portable remote terminal, averaging member, in which separate values are set in two decoders, divides clock signals transmitted from slow clock generating member as a time measuring clock with separate periods, and averages the clock signals to output slot timing signals. The slot timing signals are counted by a saving counter, which outputs a coincidence signal when the constant value is reached. Upon receiving the coincidence signal, receiving member performs reception.
16 Citations
13 Claims
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1. A receiver which comprises a slow clock generating means for outputting clock signals;
- an averaging means for dividing the clock signals transmitted from said slow clock generating means with separate periods, averaging said divided clock signals and outputting a slot timing signal to form a pulse signal which rises once in one slot time;
a saving counter for incrementing a counted value every time said slot timing signal is received and outputting a coincidence signal indicative of coincidence when said counted value coincides with the preset value; and
a receiving means for performing reception only for one slot time after said coincidence signal is received. - View Dependent Claims (2, 3, 6, 7, 8)
- an averaging means for dividing the clock signals transmitted from said slow clock generating means with separate periods, averaging said divided clock signals and outputting a slot timing signal to form a pulse signal which rises once in one slot time;
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4. An intermittent frame synchronizing method which comprises the steps of dividing clock signals transmitted from a time measuring clock with separate periods, averaging the divided clock signals, generating slot timing signals to form one pulse signal per slot time, counting said slot timing signals, and performing reception only for one slot time every time the preset constant number is reached.
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5. A receiver which comprises:
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a slow clock generating means for outputting clock signals;
an averaging means for generating slot timing signals from said clock signals to form a pulse signal which rises once in one slot time;
a saving counter for counting said slot timing signals and outputting a coincidence signal when the preset value is counted;
a receiving means for performing reception only for one slot time after said coincidence signal is outputted;
a control means provided with MPU which is stopped when there is no processing to be performed and restarts processing upon receiving an interrupt signal, and outputting a rapid clock control signal for stopping the generation of a rapid clock when said MPU is stopped;
a delay circuit for transmitting the interrupt signal to said MPU when the preset constant time elapses after the coincidence signal is received from said saving counter; and
a rapid clock generating means for receiving the rapid clock control signal for stopping the generation of said rapid clock to stop the generation of the rapid clock and for receiving the coincidence signal from said saving counter to start the generation of the rapid clock. - View Dependent Claims (9)
said receiver being the receiver as claimed in claim 5.
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10. A receiver which comprises:
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a slow clock generating means for outputting clock signals;
an averaging means for generating slot timing signals from said clock signals to form a pulse signal which rises once in one slot time;
a saving counter for counting said slot timing signals and outputting a coincidence signal when the preset value is counted;
a receiving means for performing reception only for the preset one slot time after said coincidence signal is outputted;
a control means provided with MPU which is stopped when there is no processing to be performed and restarts processing upon receiving an interrupt signal, and outputting a rapid clock control signal for stopping the generation of a rapid clock when said MPU is stopped;
a delay circuit for transmitting the interrupt signal to said MPU when the preset constant time elapses after the coincidence signal is received from said saving counter; and
a rapid clock generating means for receiving the rapid clock control signal for stopping the generation of said rapid clock to stop the generation of the rapid clock and receiving the coincidence signal from said saving counter to start the generation of the rapid clock, said averaging means comprising;
a slot counter for incrementing the counted value every time the clock signal is received from said slow clock generating means;
a first decoder for comparing the counted value of said slot counter with the first preset value and outputting a pulse signal indicative of coincidence upon coincidence;
a second decoder for comparing the counted value of said slot counter with the second preset value and outputting a pulse signal indicative of coincidence upon coincidence; and
a selector for alternately selecting the pulse signals outputted by said first decoder and said second decoder and transmitting to the outside the slot timing signal to form the pulse signal which rises once in one slot time, said receiving means comprising;
a SW detector for detecting a sync word from the received signal and outputting a pulse signal indicating that said sync word is detected; and
a slot counter for receiving said pulse signal from said SW detector and measuring said preset one slot time before outputting an end timing signal. - View Dependent Claims (11, 12, 13)
the control means comprises a storage section for storing sets of data to be set in the first decoder, the second decoder, the saving counter and the slot counter corresponding to said plurality of communication systems, the MPU refers to said storage section based on a signal transmitted from the outside for selecting the communication system to select the set of data corresponding to said selected communication system, and sets the data included in said set to said first decoder, said second decoder, said saving counter and said slot counter, and selects and operates the SW detector corresponding to said selected communication system from said plurality of SW detectors. -
12. The portable remote terminal which comprises a receiver for receiving a radio signal and demodulating a received radio signal to a received digital signal;
- a transmitter for modulating a digital signal to transmit a radio signal;
a controller for processing said received digital signal;
a voice processor for performing conversion of said digital signal to a voice signal;
a voice output section for outputting a voice; and
a voice input section for inputting a voice,said receiver being the receiver as claimed in claim 11.
- a transmitter for modulating a digital signal to transmit a radio signal;
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13. The portable remote terminal according to claim 12 wherein the plurality of communication systems include a personal digital cellular system and a personal handy phone system.
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Specification
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Current AssigneeKokusai Electric Co., Ltd.
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Original AssigneeKokusai Electric Co., Ltd.
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InventorsWakamatsu, Shunichi
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Primary Examiner(s)Kizou, Hassan
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Assistant Examiner(s)LY, ANH VU H
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Application NumberUS09/192,538Time in Patent Office1,428 DaysField of Search370/310, 370/311, 370/357, 455/343, 455/88, 455/334, 455/255, 455/571, 455/572, 455/573, 455/574, 455/575US Class Current370/311CPC Class CodesH04W 52/029 reducing the clock frequenc...H04W 52/0293 having a sub-controller wit...Y02D 30/70 in wireless communication n...
