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Cipher processor, IC card and cipher processing method

  • US 6,466,669 B1
  • Filed: 12/31/1998
  • Issued: 10/15/2002
  • Est. Priority Date: 05/30/1997
  • Status: Expired due to Term
First Claim
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1. A cipher processing apparatus performing a first data transformation process on an input data a plurality of times by a first operating circuit, wherein:

  • the first operating circuit comprises a loop processing circuit for performing a second data transformation process a plurality of times;

    wherein the loop processing circuit comprises a second operating circuit, a data holding circuit, and a selecting circuit to form a processing loop;

    wherein the second operating circuit performs the second data transformation process;

    the data holding circuit tentatively holds the data on which the second data transformation process was performed; and

    the selecting circuit selects either to terminate or to continue the second data transformation process by the loop processing circuit;

    wherein said second operating circuit comprises;

    a data dividing circuit dividing data input to the second operating circuit into a first divided data and a second divided data;

    a third operating circuit transforming the first divided data;

    an XOR circuit XORing an output data from the third operating circuit with the second divided data bit by bit; and

    a data uniting circuit uniting an output data from the XOR circuit and the second divided data.

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