Apparatus using PNP bipolar transistor as buffer to drive video signal

• US 6,468,201 B1
• Filed: 04/27/2001
• Issued: 10/22/2002
• Est. Priority Date: 04/27/2001
• Status: Expired due to Term

• Current Assignee: GE Inspection Technologies LP (General Electric Company)
• Original Assignee: Welch Allyn Incorporated
• Inventors: Burdick, Kenneth J.
• Primary Examiner(s): Leubecker, John P.
• Application Number:
  US09/844,231
• Time in Patent Office: 543 Days
• Field of Search: 600/101, 600/109, 600/110, 348/65, 348/74, 348/76, 348/294, 348/300
• US Class Current: 600/109
• CPC Class Codes: A61B 1/045 Control thereof
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H04N 23/555 for picking-up images in sites, inaccessible due to their dimensions or hazardous conditions, e.g. endoscopes or borescopes
• CPC Class Codes: H04N 23/66 Remote control of cameras or camera parts, e.g. by remote control devices

Abstract

A PNP bipolar transistor or an enhancement mode P-channel FET is used as a buffer to drive a video signal from an imager to video processing circuits. An endoscope with a solid state imager having a negative-going video pulse is used, with a video buffer located at or near the distal end to buffer the CCD video signal. The buffer employs a PNP bipolar transistor that is biased by a bias circuit for the base and a power supply for the collector, both located near the transistor, and a load for the emitter located at some distance from the transistor.

Claims

1. An endoscope apparatus which includes a solid state imager having a negative-going video pulse, comprising:

a video buffer located substantially at a distal end of said apparatus to buffer a video signal produced by said solid state imager;

said video buffer including a PNP bipolar transistor biased by a base bias circuit connected to a base of said transistor and a power supply connected to a collector of said transistor, wherein said base bias circuit and said power supply are located in said distal end of said apparatus; and

an emitter of said transistor connected through a cable to a load for said emitter, said load being located substantially at a proximal end of said apparatus.

2. An endoscope apparatus according to claim 1, further comprising a source termination resistor connected in series between said transistor and said cable.

3. An endoscope apparatus according to claim 2, wherein said base bias circuit includes a resistor connected to ground and a capacitor coupling said solid state imager to said base.

4. An endoscope apparatus according to claim 3, wherein said power supply for said collector is ground or derived directly from ground, and wherein a proper operating point for said transistor is set by controlling current supplied by said emitter load and setting a value of said resistor in said base bias circuit according to a gain of said transistor and said emitter load current.

5. An apparatus according to claim 3, wherein said power supply for said collector is derived from a power supply to said solid state imager.

6. An endoscope apparatus according to claim 1, wherein said base bias circuit includes a resistor connected to ground and a capacitor coupling said solid state imager to said base.

7. An endoscope apparatus according to claim 6, wherein said power supply for said collector is ground or derived directly from ground, and wherein a proper operating point for said transistor is set by controlling current supplied by said emitter load and setting a value of said resistor in said base bias circuit according to a gain of said transistor and said emitter load current.

8. An apparatus according to claim 7 wherein said load is a cascode amplifier configured to supply a constant current to said emitter.

9. An apparatus according to claim 8, wherein said cascode amplifier includes:

a second transistor whose emitter is connected to said emitter of said PNP bipolar junction transistor via a second coupling capacitor;

a third transistor whose collector is directly connected to a base of said second transistor and to a third capacitor which is connected to ground, and a base of said third transistor is directly connected to said emitter of said second transistor;

a second resistor in parallel across said second coupling capacitor from a first side of said second coupling capacitor to a second side of said second coupling capacitor; and

a third resistor connected directly on one end to an emitter of said third transistor and on another end to said second side of said coupling capacitor,

wherein a base-emitter voltage of said third transistor along with said second and third resistors control a current through said second transistor.