Overlay radius offset shift engine
First Claim
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1. A method of reducing the effect of placement errors during defect capture and analysis during the manufacture of integrated devices on semiconductor wafers, the method comprising:
- (a) placing a production control monitor wafer in a scan tool;
(b) doing a first scan of the production control monitor wafer to capture first scan defects;
(c) sending first scan defect information for captured defects to a defect management system;
(d) placing the production control monitor wafer in a process tool;
(e) running a monitor process on the production control monitor wafer;
(f) doing a second scan of the production control monitor wafer to capture second scan defects;
(g) sending second scan defect information for captured defects to the defect management system;
(h) evaluating second scan defect information in relation to first scan defect information in the defect management system to reduce placement errors, wherein the placement errors include wafer rotation misalignment errors, xy translation errors and scan tool tracking errors; and
(i) accurately determine adder defects and carry-over defects.
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Abstract
A method of reducing the effect of placement errors during defect capture and analysis during the manufacture of integrated devices on semiconductor wafers wherein defects from a current layer are evaluated in relation to defects from previous layers after an oversized overlay map has been utilized to perform a best-fit analysis of current defects and previous defects, the oversized overlay map reduced and a trend analysis performed to determine error type and the coordinates of defects translated to their proper location.
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10 Claims
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1. A method of reducing the effect of placement errors during defect capture and analysis during the manufacture of integrated devices on semiconductor wafers, the method comprising:
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(a) placing a production control monitor wafer in a scan tool;
(b) doing a first scan of the production control monitor wafer to capture first scan defects;
(c) sending first scan defect information for captured defects to a defect management system;
(d) placing the production control monitor wafer in a process tool;
(e) running a monitor process on the production control monitor wafer;
(f) doing a second scan of the production control monitor wafer to capture second scan defects;
(g) sending second scan defect information for captured defects to the defect management system;
(h) evaluating second scan defect information in relation to first scan defect information in the defect management system to reduce placement errors, wherein the placement errors include wafer rotation misalignment errors, xy translation errors and scan tool tracking errors; and
(i) accurately determine adder defects and carry-over defects. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Current AssigneeAdvanced Micro Devices, Inc.
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Original AssigneeAdvanced Micro Devices, Inc.
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InventorsSteffan, Paul J., Yu, Allen S.
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Primary Examiner(s)Niebling, John F.
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Assistant Examiner(s)STEVENSON, ANDRE C
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Application NumberUS09/476,582Time in Patent Office1,023 DaysField of Search701/96, 359/10, 430/5, 348/118, 382/103, 356/237.2, 700/110, 438/14US Class Current438/14CPC Class CodesH01L 22/20 Sequence of activities cons...
