Process and apparatus for maximizing a software component and minimizing a hardware component of an infrared code
First Claim
1. A minimized hardware for transmitting an infrared code, comprising:
- control logic;
a clock connected to said control logic;
an IR amplifier connected to said control logic;
an IR light emitting diode connected to said IR amplifier for emitting IR light;
a pair of carrier cycle registers connected to said control logic including a first carrier cycle register to hold a number that represents a carrier frequency and a second carrier cycle register to hold a number that represents a duty cycle; and
a pair of bit modulation registers connected to said carrier cycle registers for holding a wait time.
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Accused Products
Abstract
A process for minimizing the software component and maximizing the hardware component of an infrared code includes separating the software component from the hardware component. The software component may be stored in memory, on a disk, accessed through a remote server, stored on the hard drive of a microprocessor, or the like. The hardware component may be implemented as a simple peripheral device, an outboard integrated circuit or imbedded within a processor or on a PC motherboard. The variable IR data, such as the bit modulation technique, the function data, and the protocol data, are stored in the software component. The software component configures and controls each IR transmission. The hardware component, which transmits the IR light for sending the infrared code, includes a pair of carrier cycle registers, a pair of bit modulation registers, and buffers to enable synchronous loading of frequency, duty cycle, cycle data, and wait time sent from the software component.
12 Citations
8 Claims
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1. A minimized hardware for transmitting an infrared code, comprising:
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control logic;
a clock connected to said control logic;
an IR amplifier connected to said control logic;
an IR light emitting diode connected to said IR amplifier for emitting IR light;
a pair of carrier cycle registers connected to said control logic including a first carrier cycle register to hold a number that represents a carrier frequency and a second carrier cycle register to hold a number that represents a duty cycle; and
a pair of bit modulation registers connected to said carrier cycle registers for holding a wait time. - View Dependent Claims (2, 3, 4, 5)
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6. A process for using a maximized software component to drive a minimized hardware component to generate an infrared code, comprising the steps of:
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(a) preloading at least one buffer connected to a pair a carrier cycle registers and to a pair of bit modulation registers of said hardware component with frequency, number of cycles, and wait time sent from said software component of said IR code;
(b) loading an ON register of said carrier cycle registers with a count that represents a number of clock ticks during which an IR light is on during each carrier cycle;
(c) loading an OFF register of said carrier cycle registers with a count that represents a number of clock ticks during which an IR light is off during each carrier cycle;
(d) loading a COUNT register of said bit modulator registers with cycle data;
(e) loading a WAIT register of said bit modulator registers with a time in clock ticks between an end of a signal and the start of a next signal;
(f) initializing the system;
(g) turning on an IR light and said ON register counting down to zero;
(h) turning off said IR light when said ON register is at zero;
(i) enabling said OFF register when said ON register is at zero and said OFF register counting down to zero;
(j) decrementing said COUNT register when said OFF register is at zero;
(k) enabling said ON register if said COUNT register does not equal zero;
(l) enabling said WAIT register when said COUNT register equals zero;
(m) sending a signal from control logic, while said WAIT register is on and counting down to zero, indicating it is time to load a new bit; and
(n) reloading said carrier cycle registers and said bit modulator registers and repeating steps (a-m) until all bits have been loaded from said software component and sent by said hardware component. - View Dependent Claims (7, 8)
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Specification