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Low inductance chip with center via contact

  • US 6,477,032 B2
  • Filed: 01/31/2001
  • Issued: 11/05/2002
  • Est. Priority Date: 01/31/2001
  • Status: Expired due to Term
First Claim
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1. A multi-layer ceramic capacitive device comprising:

  • a plurality of first electrode plates with a via centrally located therein, said via having a first diameter, wherein said first electrode plates have a circular opening having a second diameter therein and wherein said circular opening surrounds said via;

    a plurality of second electrode plates with a via centrally located therein, said via having said first diameter, wherein said second electrode plates have a perimeter region of said plates removed and wherein said pluralities of first and second electrode plates are respectively interleaved in alternating planes to form a capacitive stack;

    a first terminal surrounding the perimeter of the capacitive stack and in electrical connection with each of said plurality of first electrode plates; and

    a second terminal in said via and in electrical connection with each of said plurality of second electrode plates.

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